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S7G2 Fiches technique(PDF) 41 Page - Renesas Technology Corp |
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S7G2 Fiches technique(HTML) 41 Page - Renesas Technology Corp |
41 / 116 page R01DS0262EU0100 Rev.1.00 Page 41 of 113 Feb 23, 2016 S7G2 2. Electrical Characteristics Note 1. Supply current values are with all output pins unloaded and all input pull-up MOS transistors in the off state. Note 2. Measured with clocks supplied to the peripheral functions. This does not include the BGO operation. Note 3. This does not include the BGO operation. Note 4. Supply of the clock signal to peripherals is stopped in this state. This does not include the BGO operation. Note 5. When VBATT is used. Note 6. When using ETHERC, PCLKA frequency is: 12.5MHz ≤ PCLKA ≤ 120MHz Note 7. When VCC is < VDETBATT and > (VBATT + 0.6 V), the injected current connects from the VCC to the VBATT pin through an internal diode. 2.2.6 VCC Rise and Fall Gradient and Ripple Frequency Note 1. This applies when VBATT is used. Reference power supply current (VREFH) During 12-bit A/D conversion (unit 1) AIREFH -70 120 -70 120 µA - During D/A conversion (per unit) Without AMP output - 0.24 0.4 - 0.24 0.4 mA - With AMP ouput - 0.1 0.2 - 0.1 0.2 mA - Waiting for 12-bit A/D (unit 1), D/A (all units) conversion -0.07 0.4 -0.07 0.4 µA - ADC12 unit 1 in standby modes - 0.07 0.2 - 0.07 0.2 µA - USB operating current Low speed USB ICCUSBLS - 3.5 6.5 - 3.5 6.5 mA VCC_USB USBHS - 10.5 13.5 - 10.5 13.5 mA VCC_USBHS = AVCC_USBHS (PHYSET.HSEB = 0) USBHS - 2.8 3.6 - 2.8 3.6 mA VCC_USBHS = AVCC_USBHS (PHYSET.HSEB = 1) Full speed USB ICCUSBFS - 4.0 10.0 - 4.0 10.0 mA VCC_USB USBHS - 14 22 - 14 22 mA VCC_USBHS = AVCC_USBHS (PHYSET.HSEB = 0) USBHS - 6.5 13.0 - 6.5 13.0 mA VCC_USBHS = AVCC_USBHS (PHYSET.HSEB = 1) High speed USBHS ICCUSBHS - 50 65 - 50 65 mA VCC_USBHS = AVCC_USBHS Standby mode (direct power down) USBHS ICCUSBSBY -0.5 3.0 - 0.5 3.0 μA VCC_USBHS = AVCC_USBHS Table 2.8 Rise and fall gradient characteristics Item Symbol Min Typ Max Unit Test conditions VCC rising gradient SrVCC 0.0084 - 20 ms/V - VCC falling gradient*1 SfVCC 0.0084 - - ms/V - Table 2.9 Rise and fall gradient and ripple frequency characteristics The ripple voltage must meet the allowable ripple frequency fr(VCC) within the range between the VCC upper limit (3.6 V) and lower limit (2.7 V). When the VCC change exceeds VCC ±10%, the allowable voltage change rising and falling gradient dt/dVCC must be met. Item Symbol Min Typ Max Unit Test conditions Allowable ripple frequency fr (VCC) -- 10 kHz Figure 2.2 Vr (VCC) ≤ VCC × 0.2 -- 1 MHz Figure 2.2 Vr (VCC) ≤ VCC × 0.08 -- 10 MHz Figure 2.2 Vr (VCC) ≤ VCC × 0.06 Allowable voltage change rising and falling gradient dt/dVCC 1.0 - - ms/V When VCC change exceeds VCC ±10% Table 2.7 Operating and standby current (2/2) Item Symbol LDO mode DCDC mode Unit Test conditions Min Typ Max Min Typ Max |
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