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TPD2S701QDSKRQ1 Fiches technique(PDF) 7 Page - Texas Instruments

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No de pièce TPD2S701QDSKRQ1
Description  Automotive USB 2-Channel Data Line Short-to-VBUS and IEC ESD Protection
Download  34 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPD2S701QDSKRQ1 Fiches technique(HTML) 7 Page - Texas Instruments

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TPD2S701-Q1
www.ti.com
SLLSEY0 – APRIL 2017
Product Folder Links: TPD2S701-Q1
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Copyright © 2017, Texas Instruments Incorporated
Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IVD_LEAK_3.6V
Leakage current on VD±
during normal operation
VD±
Standard mode 0 or mode 1. Set VD± = 3.6 V.
D± = floating. Measure current flowing into VD±
2.5
4
µA
VOVP_3.3V
Input overvoltage threshold
for VREF = 3.3 V
VD±
Standard mode 1. RTOP = 140 kΩ ± 1%, RBOT =
24.9 k
Ω ± 1%. Connect D± to 40-Ω load.
Measure the value at which FLTZ is asserted
3.61
4.14
4.67
V
VOVP_0.66V
Input overvoltage threshold
for VREF = 0.66 V
VD±
Standard mode 1. RTOP = 47.5 kΩ ± 1%, RBOT =
150 k
Ω ± 1%. Connect D± to 40-Ω load.
Measure the value at which FLTZ is asserted
0.72
0.83
0.94
V
DATA LINE SWITCHES – VD+ to D+ or VD– to D–
RON
On resistance
Mode 0 or 1. Set VPWR = 5 V; VREF = 3.3 V; EN
= 0 V; Measure resistance between D+ and
VD+ or D– and VD–, voltage between 0 and 0.4
V
4
6.5
Ω
RON(Flat)
On resistance flatness
Mode 0 or 1. Set VPWR = 5 V; VREF = 3.3 V; EN
= 0 V; Measure resistance between D+ and
VD+ or D– and VD–, sweep voltage between 0
and 0.4 V. Take difference of resistance at 0.4-
V and 0-V VD± bias
1
Ω
BWON
On bandwidth (–3-dB)
Mode 0 or 1. Set VPWR = 5 V; VREF = 3.3 V; EN
= 0 V; Measure S21 bandwidth from D+ to VD+
or D– to VD– with voltage swing = 400 mVpp,
Vcm = 0.2 V
960
MHz
6.8 Power Supply and Supply Current Consumption Chracteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VUVLO_RISING_
VPWR
VPWR rising UVLO threshold
Use standard mode 0 set-up. Set EN = 0 V, load D+ to 45
Ω, VD+ = 3.3 V. Set VPWR = 3.5 V, and step up VPWR until
90% of VD+ appears on D+
3.7
3.95
4.2
V
VUVLO_HYST_V
PWR
VPWR UVLO hysteresis
Use standard mode 0 set up. Set EN = 0 V, load D+ to 45
Ω, VD+ = 3.3 V. Set VPWR = 4.3 V, and step down
VPWR until D+ falls to 10% of VD+. This gives
VUVLO_FALLING_VPWR. VUVLO_RISING_VPWR
VUVLO_FALLING_VPWR = VUVLO_HYST_VPWR for this unit
250
300
400
mV
VUVLO_RISING_
VREF
VREF rising UVLO threshold
in mode 0
Use standard mode 0 set up. Set EN = 0V, load D+ to 45
Ω, VD+ = 3.3 V. Set VREF = 2.5 V, and step up
VREF until 90% of VD+ appears on D+
2.6
2.7
2.9
V
VUVLO_HYST_V
REF
VREF UVLO hysteresis
Use standard mode 0 set up. Set EN = 0 V, load D+ to 45
Ω, VD+ = 3.3 V. Set VREF = 3 V, and step down
VREF until D+ falls to 10% of VD+. This gives
VUVLO_FALLING_VREF. VUVLO_RISING_VREF
–VUVLO_FALLING_VREF = VUVLO_HYST_VREF for this unit
75
125
200
mV
IVPWR_DISABLE
D_MODE0
VPWR disabled current
consumption
Use standard mode 0. EN = 5 V . Measure current into
VPWR
110
µA
IVPWR_DISABLE
D_MODE1
VPWR disabled current
consumption
Use standard mode 1. EN = 5 V. Measure current into
VPWR
110
µA
IVREF_DISABLE
D
VREF disabled current
consumption mode 0
Use standard mode 0. EN = 5 V. Measure current into
VREF
10
µA
IVPWR_MODE0
VPWR pperating current
consumption
Use standard mode 0. EN = 0 V. Measure current into
VPWR
250
µA
IVPWR_MODE1
VPWR operating current
consumption
Use standard mode 1. EN = 0 V. Measure current into
VPWR
350
µA
IVREF
VREF operating current
consumption mode 0
Use standard mode 0. EN = 0 V. Measure current into
VREF
12
20
µA
ICHG_VREF
VREF fast charge current
Standard mode 1. 0.1 µF < CVREF < 3 µF. Set-up for
charging to 3.3 V. Use a high voltage capacitor that does
not derate capacitance up the 3.3 V. Measure slope to
calculate the current when CVREF cap is being
charged. Test to check this OPEN LOOP method
22
mA


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