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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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SI1011-A Fiches technique(PDF) 1 Page - Silicon Laboratories |
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SI1011-A Fiches technique(HTML) 1 Page - Silicon Laboratories |
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1 / 2 page  Wireless MCU Copyright © 2010 by Silicon Laboratories 1.15.10 CIP-51 8051 Controller Core 8k Byte ISP Flash Program Memory 256 Byte SRAM SFR Bus 512 Byte XRAM VDD XTAL1 SYSCLK System Clock Configuration External Oscillator Circuit Precision 24.5 MHz Oscillator Debug / Programming Hardware Power On Reset/PMU Reset C2D C2CK/RST Wake XTAL2 Low Power 20 MHz Oscillator smaRTClock Oscillator XTAL3 XTAL4 GND VREG CRC Engine RXp RXn TX XIN XOUT Analog Peripherals Comparators + - 12-bit 75ksps ADC A M U X Temp Sensor External VREF Internal VREF VDD 6-bit IREF VREF GND IREF0 CP0, CP0A + - CP1, CP1A RF XCVR (240-960 MHz) OSC PA LNA AGC Digital Modem Delta Sigma Modulator Digital Logic Mixer PGA ADC Port I/O Config Digital Peripherals UART Timers 0, 1, 2, 3 PCA/ WDT SMBus Priority Crossbar Decoder Transceiver Control Interface SPI 0 15 ANALOG & DIGITAL I/O Si1011-A Ultra-Low Power 8 kB, 12-bit ADC MCU with Integrated 240–960 MHz Transceiver Supply Voltage: 1.8 to 3.6 V - Typical sleep mode current < 0.1 µA; retains state and RAM contents over full supply range; fast wakeup of < 2 µs - Two built-in brown-out detectors cover sleep and active modes 12-Bit Analog to Digital Converter - Up to 75 ksps - Up to 11 external inputs - External pin or internal VREF (no external capacitor required) - External conversion start input option - External conversion start input option - Autonomous Burst Mode with 16-bit automatic averaging accumulator - Built-in temperature sensor Dual Comparators - Programmable hysteresis and response time - Configurable as interrupt or reset source - Low current (< 0.5 µA) Memory - 8 kB bytes Flash; in-system programmable in 512-byte sectors; full read/write/erase functionality over the entire supply range - 768 bytes internal data RAM On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in- system debug (no emulator required) High-Speed 8051 µC Core - Pipe-lined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - 25 MIPS peak throughput with 25 MHz clock Development Kit: Si1010DK Transceiver Features - Frequency range = 240–960 MHz - Sensitivity = –121 dBm - FSK, GFSK, and OOK modulation - Max output power = +20 dBm - RF power consumption - 18.5 mA receive - 85 mA @ +20 dBm transmit - Data rate = 0.123 to 256 kbps - Auto-frequency calibration (AFC) - Antenna diversity and transmit/receive switch control - Programmable packet handler - TX and RX 64 byte FIFOs - Frequency hopping capability - On-chip crystal tuning Digital Peripherals - 15 port I/O - Hardware enhanced UART, SPI and I2C serial ports available concurrently - Low power 32-bit smaRTClock - Four general purpose 16-bit counter/timers; six channel programmable counter array (PCA) Clock Sources - Precision internal oscillators: 24.5 MHz with ±2% accuracy sup- ports UART operation; spread-spectrum mode for reduced EMI - Low power 20 MHz internal oscillator - External oscillator: crystal, RC, C, CMOS clock - smaRTClock oscillator: 32.768 kHz crystal or self-oscillate Ordering Part Number - Si1011-A-GM, 42-pin QFN, 5 x 7 mm2 |
Numéro de pièce similaire - SI1011-A |
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Description similaire - SI1011-A |
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