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L6706TR Fiches technique(PDF) 8 Page - STMicroelectronics

No de pièce L6706TR
Description  High output voltage accuracy
Download  47 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6706TR Fiches technique(HTML) 8 Page - STMicroelectronics

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Pins description and connection diagrams
L6706
8/47
Doc ID 15698 Rev 2
16
OUTEN
Output enable pin.
Internally pulled up by 10 µA (typ) to 3 V. Forced low, the device stops
operations with all MOSFETs OFF: all the protections are disabled except for
preliminary over voltage. Leave floating, the device starts-up implementing soft-
start up to the selected VID code. Cycle this pin to recover latch from
protections; filter with 1 nF (typ) vs. SGND.
17
CS+
Current sense positive input.
Connect through an R-C filter to the phase-side of the output inductor.
See Section 20: Layout guidelines on page 43 for proper layout of this
connection.
18
CS-
Current sense negative input.
Connect through a Rg resistor to the output-side of the output inductor.
See Section 20: Layout guidelines on page 43 for proper layout of this
connection.
19
INT1
Test mode pin.
It must be left unconnected or connected to 3.3 V.
20 to 27
VID0 to
VID7
Voltage identification pins. (not internally pulled up).
Connect to SGND to program a '0' or connect to the external Pull-up resistor to
program a '1'. They allow programming output voltage as specified in Table 7.
28
INT2
Test mode pin.
It must be connected to SGND.
29
SSEND
Soft-start end signal.
Open drain output sets free after SS has finished and pulled low when
triggering any protection. Pull up to a voltage lower than 3.3 V, if not used it can
be left floating.
30
N.C.
Not internally connected.
31
INT3
Test mode pin.
It must be connected to 12 V.
32
N.C.
Not internally connected.
33
INT4
Test mode pin.
It must be connected to 12 V.
34
N.C.
Not internally connected.
35
VCCDR
LS driver supply.
VCDDR pin voltage has to be the same of VCC pin.
Filter with 1 x 1 µF MLCC capacitor vs. PGND.
36
LGATE
LS driver output.
A small series resistor helps in reducing device-dissipated power.
37
PGND
Power ground pin (LS drivers return path).
Connect to power ground plane.
38
PHASE
HS driver return path.
It must be connected to the HS MOSFET source and provides return path for
the HS driver.
Table 2.
Pin description (continued)
Name
Description


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