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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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H3LIS100DL Fiches technique(PDF) 27 Page - STMicroelectronics |
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H3LIS100DL Fiches technique(HTML) 27 Page - STMicroelectronics |
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27 / 38 page  DocID027504 Rev 2 27/38 H3LIS100DL Register description 38 The BOOT bit is used to refresh the content of the internal registers stored in the Flash memory block. At device power-up, the content of the Flash memory block is transferred to the internal registers related to trimming functions in order to permit correct operation of the device itself. If for any reason the content of the trimming registers is changed, it is sufficient to use this bit to restore the correct values. When the BOOT bit is set to ‘1’, the content of the internal Flash is copied inside the corresponding internal registers and it is used to calibrate the device. These values are factory trimmed and they are different for every accelerometer. They permit correct operation of the device and normally they do not have to be changed. At the end of the boot process the BOOT bit is set again to ‘0’. HPCF[1:0]. These bits are used to configure the high-pass filter cutoff frequency ft which is given by: The equation can be simplified to the following approximated equation: Table 23. High-pass filter mode configuration HPM1 HPM0 High-pass filter mode 0 0 Normal mode (reset by reading HP_RESET_FILTER) 0 1 Reference signal for filtering 1 0 Normal mode (reset by reading HP_RESET_FILTER) Table 24. High-pass filter cutoff frequency configuration HPcoeff2,1 ft [Hz] Data rate = 50 Hz ft [Hz] Data rate = 100 Hz ft [Hz] Data rate = 400 Hz 00 128 01 0.5 1 4 10 0.25 0.5 2 11 0.125 0.25 1 ft 1 1 HPc ------------ – fs 2 ------ ln = ft fs 6HPc ------------------- = |
Numéro de pièce similaire - H3LIS100DL |
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Description similaire - H3LIS100DL |
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