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SN74AUC1G125YZAR Fiches technique(PDF) 1 Page - Texas Instruments |
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SN74AUC1G125YZAR Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 13 page SN74AUC1G125 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCES382G – MARCH 2002 – REVISED JUNE 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Available in the Texas Instruments NanoStar and NanoFree Packages D Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation D Ioff Supports Partial-Power-Down Mode Operation D Sub 1-V Operable D Max tpd of 2.5 ns at 1.8 V D Low Power Consumption, 10-µA Max ICC D ±8-mA Output Drive at 1.8 V D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) description/ordering information This bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING‡ –40 C to 85 C NanoStar WCSP (DSBGA) – YEA Tape and reel SN74AUC1G125YEAR _ _ _UM_ –40 C to 85 C NanoFree WCSP (DSBGA) – YZA (Pb-free) Tape and reel SN74AUC1G125YZAR _ _ _UM_ –40 °C to 85°C NanoStar – WCSP (DSBGA) 0.23-mm Large Bump – YEP Tape and reel SN74AUC1G125YEPR _ _ _UM_ NanoFree – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) SN74AUC1G125YZPR SOT (SOT-23) – DBV Tape and reel SN74AUC1G125DBVR U25_ SOT (SC-70) – DCK Tape and reel SN74AUC1G125DCKR UM_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Copyright 2003, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DBV OR DCK PACKAGE (TOP VIEW) 1 2 3 5 4 OE A GND VCC Y 3 2 1 4 5 GND A OE Y VCC YEA, YEP, YZA, OR YZP PACKAGE (BOTTOM VIEW) NanoStar and NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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