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AD5675BRUZ Fiches technique(PDF) 1 Page - Analog Devices |
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AD5675BRUZ Fiches technique(HTML) 1 Page - Analog Devices |
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1 / 27 page  Octal, 16-Bit nanoDAC+ with I2C Interface Data Sheet AD5675 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumed byAnalog Devicesforitsuse, nor for anyinfringementsof patentsorother rightsof third partiesthatmayresult fromitsuse. Specificationssubjecttochangewithout notice.No licenseisgranted by implication or otherwiseunder anypatent or patent rightsof Analog Devices. Trademarks and registered trademarks are the property oftheir respective owners. One Technology Way , P.O. Box 9106, Norwood, MA 02062-9106, U.S .A. Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved. Technica l Support www.analog.com FEATURES High performance High relative accuracy (INL): ±3 LSB maximum at 16 bits Total unadjusted error (TUE): ±0.14% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.06% of FSR maximum Wide operating ranges −40°C to +125°C temperature range 2.7 V to 5.5 V power supply Easy implementation User selectable gain of 1 or 2 (GAIN pin/bit) 1.8 V logic compatibility I2C-compatible serial interface Robust 2 kV HBM and 1.5 kV FICDM ESD rating 20-lead TSSOP and LFCSP RoHS-compliant packages APPLICATIONS Optical transceivers Base station power amplifiers Process control (PLC input/output cards) Industrial automation Data acquisition systems GENERAL DESCRIPTION The AD5675 is a low power, octal, 16-bit buffered voltageoutput digital-to-analog converter (DAC). The device includes a gain select pin, giving a full-scale output of VREF (gain = 1) or 2 × VREF (gain = 2). The device operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic bydesign.The AD5675is available in 20-lead TSSOP and LFCSPpackages.The power-on reset circuit and a RSTSEL pin ensure thatthe outputDACs power up to zero scale or midscale and remain there untila valid write takes place. The AD5675 contains a power-downmode,reducing the current consumption to 1 µA typical while inpower-down mode. The AD5675 uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz, and includes a VLOGIC pin intended for 1.8 V to 5.5 V logic. Table 1. Octal nanoDAC+® Devices Interface Reference 16-Bit 12-Bit SPI Internal AD5676R AD5672R External AD5676 Not applicable I2C Internal AD5675R AD5671R FUNCTIONAL BLOCK DIAGRAM INPUT REGISTER A0 A1 GND VOUT7 LDAC SDA SCL AD5675 RESET 2.5V REF VOUT0 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 DAC REGISTER STRING DAC 0 BUFFER INPUT REGISTER DAC REGISTER STRING DAC 1 BUFFER INPUT REGISTER DAC REGISTER STRING DAC 2 BUFFER INPUT REGISTER DAC REGISTER STRING DAC 3 BUFFER INPUT REGISTER DAC REGISTER STRING DAC 4 BUFFER INPUT REGISTER DAC REGISTER STRING DAC 5 BUFFER INPUT REGISTER DAC REGISTER STRING DAC 6 BUFFER INPUT REGISTER DAC REGISTER STRING DAC 7 BUFFER GAIN POWER-DOWN LOGIC POWER-ON RESET VLOGIC VDD VREF RSTSEL GAIN ×1/×2 Figure 1. |
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