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ZSPM2000 Fiches technique(PDF) 38 Page - Integrated Device Technology |
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ZSPM2000 Fiches technique(HTML) 38 Page - Integrated Device Technology |
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38 / 42 page  ZSPM2000 Datasheet © 2016 Integrated Device Technology, Inc. 38 January 27, 2016 6 Synchronous MOSFET Driver Features 6.1. Introduction The synchronous MOSFET gate driver of the ZSPM2000 is designed to drive the N-channel MOSFETs of a low voltage step-down converter. The driver supply voltage (VDD50DRV) is 5V, and the driver is capable of driving a 3nF load. The input under-voltage lockout function guarantees the outputs are low when the supply voltage is low. 6.2. Adaptive Non-overlap Dead-Time Control Adaptive dead-time control is used to avoid shoot-through damage of the power MOSFETs. See section 1.3 for the timing specifications for this function, which are illustrated in Figure 6.1. When the internal PWM signal pulls high, the driver will monitor the gate voltage of the low side MOSFET; i.e., the DRVL pin of the ZSPM2000. When the DRVL voltage falls below the gate threshold, DRVH will be set to high after the tpdhDRVH delay. When the PWM is set low, DRVH will be set low, and the driver will monitor the gate voltage of the high-side MOSFET. When the voltage between the DRVH and SW pins falls below the top gate drive threshold, DRVL will be set to high after the tpdhDRVL delay. Figure 6.1 Adaptive Non-overlap Dead-Time Control Timing Diagram Note: the PWM signal is internal. 90% 10% tfDRVL 1V 10% 90% tpdhDRVH trDRVH PWM DRVL DRVH - SW SW 90% 10% tfDRVH 1.7V 10% 90% tpdhDRVL trDRVL 6.3. Layout Guidelines Layout of the point-of-load (POL) converter PCB is very important. The bootstrap (BST) pin and VDD50DRV pin decoupling capacitors should be placed as close as possible to the ZSPM2000. The VDD50DRV bypass capacitor should be connected to the PGND pin of the ZSPM2000. Connect the PGND pin to the ground plane of the power stage. The ground plane can provide a good return path for the gate drive current and reduce the ground noise. To minimize the ground loop for the low-side MOSFET, place the PGND pin close to the source pin of the low-side MOSFET. The gate drive traces should be routed to minimize the length; the recommended minimum width is 20 mils. |
Numéro de pièce similaire - ZSPM2000 |
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Description similaire - ZSPM2000 |
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