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AD8557ARZ-REEL Fiches technique(PDF) 5 Page - Analog Devices |
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AD8557ARZ-REEL Fiches technique(HTML) 5 Page - Analog Devices |
5 / 25 page AD8557 Data Sheet Rev. D | Page 4 of 24 VDD = 2.7 V, VSS = 0.0 V, VCM = 1.35 V, VOUT = 1.35 V, gain = 28, TA = −40°C to +125°C, unless otherwise specified. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT STAGE Input Offset Voltage VOS 2 12 μV Input Offset Voltage Drift TCVOS 65 nV/°C Input Bias Current IB 10 18 25 nA Input Offset Current IOS 1 4 nA Input Voltage Range 0.6 1.5 V Common-Mode Rejection Ratio CMRR VCM = 0.9 V to 1.5 V, AV = 28 71 82 dB VCM = 0.9 V to 1.5 V, AV = 1300 96 112 dB Linearity VOUT = 0.2 V to 1.8 V 20 ppm VOUT = 0.2 V to 2.5 V 1000 ppm Differential Gain Accuracy Second stage gain = 10 to 250 1.6 % Differential Gain Temperature Coefficient Second stage gain = 10 to 250 15 40 ppm/°C DAC Accuracy Offset codes = 8 to 248 0.7 0.8 % Ratiometricity Offset codes = 8 to 248 50 ppm Output Offset Offset codes = 8 to 248 5 35 mV Temperature Coefficient 20 80 ppm FS/°C VCLAMP Input Bias Current ICLAMP 1.25 V to 2.7 V 200 nA Input Voltage Range 1.25 2.7 V OUTPUT STAGE Short-Circuit Current ISC Source −12 −7 mA Sink 15 25 mA Output Voltage, Low VOL RL = 10 kΩ to 2.7 V 30 mV Output Voltage, High VOH RL = 10 kΩ to 0 V 2.64 V POWER SUPPLY Supply Current ISY VPOS = VNEG = 1.35 V, VDAC code = 128, VOUT = 1.35 V 1.8 mA Power Supply Rejection Ratio PSRR VDD = 2.7 V to 5.5 V 105 125 dB DYNAMIC PERFORMANCE Gain Bandwidth Product GBP First gain stage, TA = 25°C 2 MHz Second gain stage, TA = 25°C 8 MHz Settling Time ts To 0.1%, 2 V output step, TA = 25°C 8 μs NOISE PERFORMANCE Input Referred Noise f = 1 kHz 32 nV/√Hz Low Frequency Noise en p-p f = 0.1 Hz to 10 Hz 0.5 μV p-p Total Harmonic Distortion THD VIN = 16.75 mV rms, f = 1 kHz −100 dB DIGITAL INTERFACE Input Current 2 μA DIGIN Pulse Width to Load 0 tw0 TA = 25°C 0.05 10 μs DIGIN Pulse Width to Load 1 tw1 TA = 25°C 50 μs Time Between Pulses at DIGIN tws TA = 25°C 10 μs DIGIN Low TA = 25°C 0.2 × VDD V DIGIN High TA = 25°C 0.8 × VDD V DIGOUT Logic 0 TA = 25°C 0.2 × VDD V DIGOUT Logic 1 TA = 25°C 0.8 × VDD V |
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