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CD74HCT139 Datasheet(Fiches technique) 5 Page - Harris Corporation

Numéro de pièce CD74HCT139
Description  High Speed CMOS Logic Dual 2-to-4 Line Decoder/Demultiplexer
Télécharger  5 Pages
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Fabricant  HARRIS [Harris Corporation]
Site Internet  http://www.harris.com
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5
Output Transition Time (Figure 1) tTLH, tTHL
CL = 50pF
2
-
-
75
-
95
-
110
ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Power Dissipation
Capacitance, (Notes 5, 6)
CPD
-
5
-55-
-
-
-
-
pF
Input Capacitance
CIN
-
-
-
-
10
-
10
-
10
pF
HCT TYPES
Propagation Delay
A0, A1 to Outputs
tPLH,
tPHL
CL = 50pF
4.5
-
-
34
-
43
-
51
ns
E to Outputs
tPLH,
tPHL
CL = 50pF
4.5
-
-
34
-
43
-
51
ns
Select to Output
tPLH, tPHL
CL = 15pF
5
-
14
-
-
-
-
-
ns
Enable to Output
tPLH, tPHL
CL = 15pF
5
-
14
-
-
-
-
-
ns
Output Transition Time
(Figure 2)
tTLH, tTHL
CL = 50pF
4.5
-
-
15
-
19
-
22
ns
Power Dissipation
Capacitance, (Notes 5, 6)
CPD
-
5
-59-
-
-
-
-
pF
Input Capacitance
CIN
-
-
-
-
10
-
10
-
10
pF
NOTES:
5. CPD is used to determine the dynamic power consumption, per decoder/demux.
6. PD = VCC
2 f
i (CPD + CL) where: fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
Switching Specifications Input tr, tf = 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC
(V)
25oC
-40oC TO
85oC
-55oC TO
125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
Test Circuits and Waveforms
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
tPHL
tPLH
tTHL
tTLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
VCC
tr = 6ns
tf = 6ns
90%
tPHL
tPLH
tTHL
tTLH
2.7V
1.3V
0.3V
1.3V
10%
INVERTING
OUTPUT
INPUT
GND
3V
tr = 6ns
tf = 6ns
90%
CD74HC139, CD74HCT139




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