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SI5345-44-42 Fiches technique(PDF) 1 Page - Silicon Laboratories |
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SI5345-44-42 Fiches technique(HTML) 1 Page - Silicon Laboratories |
1 / 62 page Rev. 1.0 7/15 Copyright © 2015 by Silicon Laboratories Si5345/44/42 Si5345/44/42 10-C HANNEL, A NY-F REQUENCY, A NY-O UTPUT J ITTER A TTENUATOR/C LOCK M ULTIPLIER Features Device Selector Guide Applications Description These jitter attenuating clock multipliers combine fourth-generation DSPLL and MultiSynth™ technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. These devices are programmable via a serial interface with in-circuit programmable non- volatile memory (NVM) so they always power up with a known frequency configuration. They support free-run, synchronous, and holdover modes of operation, and offer both automatic and manual input clock switching. The loop filter is fully integrated on-chip, eliminating the risk of noise coupling associated with discrete solutions. Further, the jitter attenuation bandwidth is digitally programmable, providing jitter performance optimization at the application level. Programming the Si5345/44/42 is easy with Silicon Labs’ ClockBuilder Pro software. Factory preprogrammed devices are also available. Generates any combination of output frequencies from any input frequency Input frequency range: Differential: 8 kHz to 750 MHz LVCMOS: 8 kHz to 250 MHz Output frequency range: Differential: up to 712.5 MHz LVCMOS: up to 250 MHz Ultra-low jitter: <100 fs typ (12 kHz–20 MHz) Programmable jitter attenuation bandwidth from 0.1 Hz to 4 kHz Meets G.8262 EEC Opt 1, 2 (SyncE) Highly configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML, and HCSL with programmable signal amplitude Status monitoring (LOS, OOF, LOL) Hitless input clock switching: automatic or manual Locks to gapped clock inputs Automatic free-run and holdover modes Optional zero delay mode Fastlock feature for low nominal bandwidths Glitchless on the fly output frequency changes DCO mode: as low as 0.001 ppb steps. Core voltage VDD: 1.8 V ±5% VDDA: 3.3 V ±5% Independent output clock supply pins: 3.3 V, 2.5 V, or 1.8 V Output-output skew: 20 ps typ Serial interface: I2C or SPI In-circuit programmable with non-volatile OTP memory ClockBuilder ProTM software simplifies device configuration Si5345: 4 input, 10 output, 64 QFN Si5344: 4 input, 4 output, 44 QFN Si5342: 4 input, 2 output, 44 QFN Temperature range: –40 to +85 °C Pb-free, RoHS-6 compliant Grade Max Output Frequency Frequency Synthesis Modes Si534fA 712.5 MHz Integer+Fractional Si534fB 350 MHz Integer+Fractional Si534fC 712.5 MHz Integer Si534fD 350 MHz Integer OTN Muxponders and Transponders 10/40/100G networking line cards GbE/10GbE/100GbE Synchronous Ethernet (ITU-T G.8262) Carrier Ethernet switches SONET/SDH Line Cards Broadcast video Test and measurement ITU-T G.8262 (SyncE) Compliant Functional Block Diagram Ordering Information: See section 8 DSPLL IN0 IN_SEL IN1 IN2 IN3/ FB_IN ÷FRAC ÷FRAC ÷FRAC ÷FRAC XTAL XB XA OSC Si5345/44/42 Optional External Feedback Multi Synth OUT0 ÷INT OUT1 ÷INT OUT2 ÷INT OUT3 ÷INT OUT4 ÷INT OUT5 ÷INT OUT6 ÷INT OUT7 ÷INT OUT8 ÷INT OUT9 ÷INT Multi Synth Multi Synth Multi Synth Multi Synth NVM I2C/SPI Control/ Status |
Numéro de pièce similaire - SI5345-44-42 |
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Description similaire - SI5345-44-42 |
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