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SI5344H-42H Fiches technique(PDF) 5 Page - Silicon Laboratories |
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SI5344H-42H Fiches technique(HTML) 5 Page - Silicon Laboratories |
5 / 56 page Si5344H/42H Rev. 1.0 5 Table 2. DC Characteristics (VDD =1.8 V ±5%, VDDA =3.3 V ±5%, VDDO = 1.8 V ±5%, 2.5 V ±5%, or 3.3 V ±5%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Core Supply Current IDD Si5342H Si5344H — 145 190 mA IDDA — 120 125 mA Output Buffer Supply Current IDDOx High-Frequency Output Mode (AC-coupled) @2.75GHz —45 51 mA LVPECL Output @ 156.25 MHz —22 26 mA LVDS Output @ 156.25 MHz —15 18 mA 3.3 V LVCMOS output @ 156.25 MHz —22 30 mA 2.5 V LVCMOS output @ 156.25 MHz —18 23 mA 1.8 V LVCMOS output @ 156.25 MHz —12 16 mA Total Power Dissipation Pd Si5344H Notes 1, 5 — 900 1000 mW Si5342H Notes 2, 5 — 800 900 mW Notes: 1. Si5344H test configuration: 2 x 2.5 V LVDS outputs @ 156.25 MHz, 2 x 2.5 V Differential High-Speed Output Mode (ac-coupled) @ 2.104658 GHz. Excludes power in termination resistors. 2. Si5342H test configuration: 1 x 2.5 V LVDS output @ 156.25 MHz, 1 x 2.5 V Differential High-Speed Output Mode (ac- coupled) @ 2.104658 GHz. Excludes power in termination resistors. 3. Differential outputs terminated into an ac-coupled 100 load. 4. LVCMOS outputs measured into a 6 inch 50 PCB trace with 5 pF load. Measurements were made in CMOS3 mode. 5. Detailed power consumption for any configuration can be estimated using ClockBuilder Pro when an evaluation board (EVB) is not available. All EVBs support detailed current measurements for any configuration. 50 50 100 OUT OUT IDDO Differential Output Test Configuration 0.1 uF 0.1 uF 50 OUTa IDDO 5 pF LVCMOS Output Test Configuration 6 inch OUTb |
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