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LM2642 Fiches technique(PDF) 2 Page - National Semiconductor (TI) |
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LM2642 Fiches technique(HTML) 2 Page - National Semiconductor (TI) |
2 / 20 page Connection Diagram TOP VIEW 20046202 28-Lead TSSOP (MTC) Order Number LM2642MTC See NS Package Number MTC28 Pin Descriptions KS1 (Pin 1): The positive (+) Kelvin sense for the internal current sense amplifier of Channel 1. Use a separate trace to connect this pin to the current sense point. It should be connected to VIN as close as possible to the node of the current sense resistor. When no current-sense resistor is used, connect as close as possible to the drain node of the upper MOSFET. ILIM1 (Pin 2): Current limit threshold setting for Channel 1. It sinks a constant current of 10 µA, which is converted to a voltage across a resistor connected from this pin to VIN. The voltage across the resistor is compared with either the VDS of the top MOSFET or the voltage across the external cur- rent sense resistor to determine if an over-current condition has occurred in Channel 1. COMP1 (Pin 3): Compensation pin for Channel 1. This is the output of the internal transconductance amplifier. The com- pensation network should be connected between this pin and the signal ground, SGND (Pin 8). FB1 (Pin 4): Feedback input for channel 1. Connect to VOUT through a voltage divider to set the channel 1 output voltage. PGOOD1 (Pin 5): An open-drain power-good output for Channel 1. It is ’LOW’ (low impedance to ground) whenever the output voltage of Channel 1 falls outside of a +15% to -9% window. PGOOD1 stays latched in a ’LOW’ state during OVP or UVP on either channel. It will recover to a ’HIGH’ state (high impedance to ground) after a Channel 1 output under-voltage event (<91%) when the output returns to within 6% of its nominal value. See Operation Descriptions for details. UV_DELAY (Pin 6): A capacitor from this pin to ground sets the delay time for UVP. The capacitor is charged from a 5µA current source. When UV_DELAY charges to 2.3V (typical), the system immediately latches off. Connecting this pin to ground will disable the output under-voltage protection. VLIN5 (Pin 7): The output of an internal 5V LDO regulator derived from VIN. It supplies the internal bias for the chip and supplies the bootstrap circuitry for gate drive. Bypass this pin to signal ground with a minimum of 4.7µF capacitor. SGND (Pin 8): The ground connection for the signal-level circuitry. It should be connected to the ground rail of the system. ON/SS1 (Pin 9): Channel 1 enable pin. This pin is internally pulled up to one diode drop above VLIN5. Pulling this pin below 1.2V (open-collector type) turns off Channel 1. If both ON/SS1 and ON/SS2 pins are pulled below 1.2V, the whole chip goes into shut down mode. Adding a capacitor to this pin provides a soft-start feature that minimizes inrush current and output voltage overshoot. ON/SS2 (Pin 10): Channel 2 enable pin. See the description for Pin 9, ON/SS1. May be connected to ON/SS1 for simul- taneous startup or for parallel operation. FB2 (Pin 11): Feedback input for channel 2. Connect to VOUT through a voltage divider to set the Channel 2 output voltage. COMP2 (Pin 12): Compensation pin for Channel 2. This is the output of the internal transconductance amplifier. The compensation network should be connected between this pin and the signal ground SGND (Pin 8). ILIM2 (Pin 13): Current limit threshold setting for Channel 2. See ILIM1 (Pin 2). KS2 (Pin 14): The positive (+) Kelvin sense for the internal current sense amplifier of Channel 2. See KS1 (Pin 1). RSNS2 (Pin 15): The negative (-) Kelvin sense for the internal current sense amplifier of Channel 2. Connect this pin to the low side of the current sense resistor that is placed between VIN and the drain of the top MOSFET. When the Rds of the top MOSFET is used for current sensing, connect this pin to the source of the top MOSFET. Always use a separate trace to form a Kelvin connection to this pin. www.national.com 2 |
Numéro de pièce similaire - LM2642 |
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Description similaire - LM2642 |
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