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S29GL512T12TFNyyxx Fiches technique(PDF) 45 Page - Cypress Semiconductor |
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S29GL512T12TFNyyxx Fiches technique(HTML) 45 Page - Cypress Semiconductor |
45 / 105 page Document Number: 002-00247 Rev. *G Page 45 of 105 S29GL01GT, S29GL512T Notes: 1. Not 100% tested. 2. Typical program and erase times assume the following conditions: 25°C, 3.0V VCC, 10,000 cycle, and a random data pattern. 3. Effective write buffer specification is based upon a 512-byte write buffer operation. 4. 512-byte load is not supported in x8 mode. 5. In the pre-programming step of the Embedded Erase algorithm, all words are programmed to 0000h before Sector and Chip erasure. 6. System-level overhead is the time required to execute the bus-cycle sequence for the program command. See Table 7.1, Command Definitions x16 on page 48 for further information on command definitions. Table 5.8 Embedded Algorithm Characteristics ( 40 °C to +105 °C) Parameter Min Typ (Note 2) Max (Note 3) Unit Comments Sector Erase Time 128 kbyte 535 3500 ms Includes pre-programming prior to erasure (Note 7) Chip Erase GL512T 274 1792 (Note 1) s GL01GT 548 3584 (Note 1) Single Word Programming Time (Note 1) 160 1050 µs Buffer Programming Time 2-byte (Note 1) 160 1050 µs 32-byte (Note 1) 195 1050 64-byte (Note 1) 219 1050 128-byte (Note 1) 258 1050 256-byte (Note 1) 327 1050 512-byte (Note 1) 451 1050 Effective Write Buffer Program Operation per Word 512-byte 1.76 µs Sector Programming Time 128 kB (full Buffer Programming) 115.4 269 ms (Note 8) Erase Suspend Latency (tESL) 50 µs Program Suspend Latency (tPSL) 50 µs Erase Resume to next Erase Suspend (tERS) 100 µs Minimum of 60 ns but typical periods are needed for Erase to progress to completion. Program Resume to next Program Suspend (tPRS) 100 µs Minimum of 60 ns but typical periods are needed for Program to progress to completion. Evaluate Erase Status (tEES)25 30 µs Blank Check 7.6 9.0 ms NOP (Number of Program-operations, per Line) 1 per 16 word |
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