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S29GL01GT11FAIyyx Datasheet(Fiches technique) 51 Page - Cypress Semiconductor

Numéro de pièce S29GL01GT11FAIyyx
Description  1 Gbit (128 Mbyte), 512 Mbit (64 Mbyte)
Télécharger  105 Pages
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Fabricant  CYPRESS [Cypress Semiconductor]
Site Internet  http://www.cypress.com
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Document Number: 002-00247 Rev. *G
Page 51 of 105
S29GL01GT, S29GL512T
12. The Erase Resume/Program Resume command is valid only during the Erase Suspend/Program Suspend modes.
13. Issue this command sequence to return to Read State after detecting device is in a Write-to-Buffer-Abort state. IMPORTANT: the full command
sequence is required if resetting out of ABORT.
14. The Exit command returns the device to reading the array.
15. The password portion can be entered or read in any order as long as the entire 64-bit password is entered or read. Addresses are
10h-13h if the SSR3 is being accessed.
16. For PWDx, only one portion of the password can be programmed per each A0 command. Portions of the password must be programmed in
sequential order (PWD0 - PWD3).
17. All Lock Register bits are one-time programmable. The program state = 0 and the erase state = 1. Also, both the Persistent Protection Mode
Lock Bit and the Password Protection Mode Lock Bit cannot be programmed at the same time or the Lock Register Bits Program operation
halts and returns the device to Read State. Lock Register bits that are reserved for future use are undefined and may be 0’s or 1's.
18. If any of the Entry commands was issued, an Exit command must be issued to reset the device into Read State.
19. Protected State = 00h, Unprotected State = 01h. The sector address for DYB set, DYB clear, or PPB Program command may be any location
within the sector - the lower order bits of the sector address are don't care.
20. See Section 5.4.7.2, Sector Erase on page 30 for description of Multi-Sector Erase.
Table 7.2 Command Definitions x8
Command Sequence
(Note 1)
Bus Cycles (Notes 2-5)
First
Second
Third
Fourth
Fifth
Sixth
Seventh
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read (Note 5)
1
RA
RD
Reset/ASO Exit (Notes 6, 17)
1
XXX
F0
Status Register Read
2
AAA
70
XXX
RD
Status Register Clear
1
AAA
71
Word Program
4
AAA
AA
555
55
AAA
A0
PA
PD
Write to Buffer (Note 19)
6
AAA
AA
555
55
SA
25
SA
WC
WBL
PD
WBL
PD
Program Buffer to Flash (confirm)
1
SA
29
Write-to-Buffer-Abort Reset
(Note 12)
3
AAA
AA
555
55
AAA
F0
Enter
3
AAA
AA
555
55
AAA
20
Program (Note 8)
2
XXX
A0
PA
PD
Write-to-Buffer (Note 8)
4
SA
25
SA
WC
WBL
PD
WBL
PD
Program Buffer to Flash
(confirm) (Note 8)
1SA
29
Write-to-Buffer-Abort Reset
(Note 12)
3
AAA
AA
555
55
AAA
F0
Sector Erase (Note 8)
2
XXX
80
SA
30
Chip Erase (Note 8)
2
XXX
80
XXX
10
Command Set Exit (Note 9)
2
XXX
90
XXX
00
Chip Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
AAA
10
Sector Erase (Note 19)
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
SA
30
Erase Suspend/Program
Suspend
Legacy Method (Note 10)
1
XXX
B0
Erase Suspend Enhanced
Method
Erase Resume/Program Resume
Legacy Method (Note 11)
1XXX
30
Erase Resume Enhanced
Method
Program Suspend Enhanced
Method
1XXX
51
Program Resume Enhanced
Method
1XXX
50
Evaluate Erase State
1
(SA)
AAA
35
Blank Check
1
(SA)
AAA
33




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