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Moteur de recherche de fiches techniques de composants électroniques |
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S26KS512S Fiches technique(PDF) 28 Page - Cypress Semiconductor |
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S26KS512S Fiches technique(HTML) 28 Page - Cypress Semiconductor |
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28 / 98 page  S26KL512S / S26KS512S S26KL256S / S26KS256S S26KL128S / S26KS128S Document Number: 001-99198 Rev. *F Page 28 of 98 Once the specified number of write buffer locations has been loaded, the system must then write the Program Buffer to Flash command at the Sector Address. The device then goes busy. The Embedded Program algorithm automatically programs and verifies the data for the correct data pattern. The system is not required to provide any controls or timings during these operations. If an incorrect number of write buffer locations have been loaded the operation will abort and return to the initiating state. The abort occurs as well when anything other than the Program Buffer to Flash is written when that command is expected at the end of the word count number of data words. The Write-Buffer Embedded Programming operation can be suspended using the Program Suspend command. When the Embedded Program algorithm is complete, the EAC then returns to the EAC Standby or Erase Suspend Standby state where the programming operation was started. The system can determine the status of the program operation by using the Status Register (Table 17, Status Register on page 36). See Figure 14, Write Buffer Programming Operation with Status Register on page 29 for a diagram of the programming operation. The Write Buffer Programming Sequence will be Aborted under the following conditions: Load a Word Count value greater than the buffer size (255). Write an address that is outside the Line provided in the Write to Buffer command. The Program Buffer to Flash command is not issued after the Write Word Count number of data words is loaded. When any of the conditions that cause an abort of write buffer command occur the abort will happen immediately after the offending condition, and will indicate a Program Fail in the Status Register at bit location 4 (PSB = 1) due to Write Buffer Abort bit location 3 (WBASB = 1). The next successful program operation will clear the failure status or a Clear Status Register may be issued to clear the PSB status bit. The Write Buffer Programming sequence can be terminated by the following: Hardware Reset or Power cycle. However, using either of these methods may leave the area being programmed in an intermediate state with invalid or unstable data values. In this case the same area will need to be reprogrammed with the same data or erased to ensure data values are properly programmed or erased. To ensure the best data integrity, the sector in which the program operation was terminated must be erased and re- programed. |
Numéro de pièce similaire - S26KS512S |
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Description similaire - S26KS512S |
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