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FL116K Fiches technique(PDF) 49 Page - Cypress Semiconductor |
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FL116K Fiches technique(HTML) 49 Page - Cypress Semiconductor |
49 / 90 page Document Number: 002-00497 Rev. *E Page 49 of 90 S25FL116K, S25FL132K, S25FL164K 3Ch JEDEC Basic Flash Parameter Dword-16 E8h Bits 31:24 = Enter 4-Byte Addressing = xxxx_xxx1b:issue instruction B7 (preceding write enable not required + xx1x_xxxxb: Supports dedicated 4-byte address instruction set. Consult vendor data sheet for the instruction set definition or look for 4- byte Address Parameter Table. + 1xxx_xxxxb: Reserved = 10000000b not supported Bits 23:14 = Exit 4-byte Addressing = xx_xxxx_xxx1b:issue instruction E9h to exit 4-byte address mode (Write enable instruction 06h is not required) + xx_xx1x_xxxxb: Hardware reset + xx_x1xx_xxxxb: Software reset (see bits 13:8 in this DWORD) + xx_1xxx_xxxxb: Power cycle + x1_xxxx_xxxxb: Reserved + 1x_xxxx_xxxxb: Reserved = 11_0000_0000b not supported Bits 13:8 = Soft Reset and Rescue Sequence Support = x1_xxxxb: issue reset enable instruction 66h, then issue reset instruction 99h. The reset enable, reset sequence may be issued on 1,2, or 4 wires depending on the device operating mode = 01_0000b Bit 7 = RFU = 1 Bits 6:0 = Volatile or Non-Volatile Register and Write Enable Instruction for Status Register 1 = xxx_1xxxb: Non-Volatile/Volatile status register 1 powers-up to last written value in the non-volatile status register, use instruction 06h to enable write to non-volatile status register. Volatile status register may be activated after power-up to override the non-volatile status register, use instruction 50h to enable write and activate the volatile status register. + x1x_xxxxb: Reserved + 1xx_xxxxb: Reserved = 1101000b Binary Fields: 10000000-1100000000-010000-1-1101000 Nibble Format: 1000_0000_1100_0000_0001_0000_1110_1000 Hex Format: 80_C0_10_E8 3Dh 10h 3Eh C0h 3Fh 80h Table 6.7 Basic SPI Flash Parameter, JEDEC SFDP Rev B (Continued) SFDP Parameter Relative Byte Address SFDP Dword Name Data Description |
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