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CY8C4127AXI-M485 Fiches technique(PDF) 38 Page - Cypress Semiconductor |
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CY8C4127AXI-M485 Fiches technique(HTML) 38 Page - Cypress Semiconductor |
38 / 41 page PSoC® 4: PSoC 4100M Family Datasheet Document Number: 001-96519 Rev. *E Page 38 of 41 PGA programmable gain amplifier PHUB peripheral hub PHY physical layer PICU port interrupt control unit PLA programmable logic array PLD programmable logic device, see also PAL PLL phase-locked loop PMDD package material declaration data sheet POR power-on reset PRES precise power-on reset PRS pseudo random sequence PS port read data register PSoC® Programmable System-on-Chip™ PSRR power supply rejection ratio PWM pulse-width modulator RAM random-access memory RISC reduced-instruction-set computing RMS root-mean-square RTC real-time clock RTL register transfer language RTR remote transmission request RX receive SAR successive approximation register SC/CT switched capacitor/continuous time SCL I2C serial clock SDA I2C serial data S/H sample and hold SINAD signal to noise and distortion ratio SIO special input/output, GPIO with advanced features. See GPIO. SOC start of conversion SOF start of frame SPI Serial Peripheral Interface, a communications protocol SR slew rate SRAM static random access memory SRES software reset SWD serial wire debug, a test protocol SWV single-wire viewer TD transaction descriptor, see also DMA Table 43. Acronyms Used in this Document (continued) Acronym Description THD total harmonic distortion TIA transimpedance amplifier TRM technical reference manual TTL transistor-transistor logic TX transmit UART Universal Asynchronous Transmitter Receiver, a communications protocol UDB universal digital block USB Universal Serial Bus USBIO USB input/output, PSoC pins used to connect to a USB port VDAC voltage DAC, see also DAC, IDAC WDT watchdog timer WOL write once latch, see also NVL WRES watchdog timer reset XRES external reset I/O pin XTAL crystal Table 43. Acronyms Used in this Document (continued) Acronym Description |
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