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CY8C4128FNI-BL473 Fiches technique(PDF) 18 Page - Cypress Semiconductor

No de pièce CY8C4128FNI-BL473
Description  Programmable System-on-Chip
Download  47 Pages
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Fabricant  CYPRESS [Cypress Semiconductor]
Site Internet  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C4128FNI-BL473 Fiches technique(HTML) 18 Page - Cypress Semiconductor

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PRELIMINARY
PSoC® 4: PSoC 4XX8_BLE
Family Datasheet
Document Number: 001-94624 Rev. *K
Page 18 of 47
Electrical Specifications
Absolute Maximum Ratings
Device-Level Specifications
All specifications are valid for –40 °C
 TA  85 °C and TJ  100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted.
Note
1. Usage above the absolute maximum conditions listed in Table 5 may cause permanent damage to the device. Exposure to absolute maximum conditions for extended
periods of time may affect device reliability. The maximum storage temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High Temperature
Storage Life. When used below absolute maximum conditions but above normal operating conditions, the device may not operate to specification.
Table 5. Absolute Maximum Ratings[1]
Spec ID#
Parameter
Description
Min
Typ
Max
Units
Details/
Conditions
SID1
VDDD_ABS
Analog, digital, or radio supply
relative to VSS (VSSD = VSSA)
–0.5
6
V
Absolute max
SID2
VCCD_ABS
Direct digital core voltage input
relative to VSSD
–0.5
1.95
V
Absolute max
SID3
VGPIO_ABS
GPIO voltage
–0.5
VDD +0.5
V
Absolute max
SID4
IGPIO_ABS
Maximum current per GPIO
–25
25
mA
Absolute max
SID5
IGPIO_injection
GPIO injection current, Max for VIH
> VDDD, and Min for VIL < VSS
–0.5
0.5
mA
Absolute max, current
injected per pin
BID57
ESD_HBM
Electrostatic discharge human body
model
2200
V
BID58
ESD_CDM
Electrostatic discharge charged
device model
500
V
BID61
LU
Pin current for latch-up
–200
200
mA
Table 6. DC Specifications
Spec ID#
Parameter
Description
Min
Typ
Max
Units
Details/
Conditions
SID6
VDD
Power supply input voltage (VDDA =
VDDD = VDD)
1.8
5.5
V
With regulator enabled
SID7
VDD
Power supply input voltage unregu-
lated (VDDA = VDDD = VDD)
1.71
1.8
1.89
V
Internally unregulated
supply
SID8
VDDR
Radio supply voltage (Radio ON)
1.9
5.5
V
SID8A
VDDR
Radio supply voltage (Radio OFF)
1.71
5.5
V
SID9
VCCD
Digital regulator output voltage (for
core logic)
–1.8
V
SID10
CVCCD
Digital regulator output bypass
capacitor
1
1.3
1.6
µF
X5R ceramic or better
Active Mode, VDD = 1.71 V to 5.5 V
SID13
IDD3
Execute from flash; CPU at 3 MHz
1.7
mA
T = 25 °C,
VDD = 3.3 V
SID14
IDD4
Execute from flash; CPU at 3 MHz
mA
T = –40 C to 85 °C
SID15
IDD5
Execute from flash; CPU at 6 MHz
2.5
mA
T = 25 °C,
VDD = 3.3 V
SID16
IDD6
Execute from flash; CPU at 6 MHz
mA
T = –40 °C to 85 °C
SID17
IDD7
Execute from flash; CPU at 12 MHz
4
mA
T = 25 °C,
VDD = 3.3 V
SID18
IDD8
Execute from flash; CPU at 12 MHz
mA
T = –40 °C to 85 °C


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