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CYW20730A1KMLGT Fiches technique(PDF) 6 Page - Cypress Semiconductor

No de pièce CYW20730A1KMLGT
Description  Single-Chip Bluetooth Transceiver for Wireless Input Devices
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Fabricant  CYPRESS [Cypress Semiconductor]
Site Internet  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

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Broadcom®, the pulse logo, Connecting everything®, and the Connecting everything logo are among the
registered trademarks of Broadcom Corporation and/or its subsidiaries in the United States, certain other
countries, and/or the EU. Bluetooth® is a trademark of the Bluetooth SIG. Any other trademarks or trade
names mentioned are the property of their respective owners.
Confidential and Proprietary Information: This document and the software are proprietary properties of
Broadcom Corporation. This software package may only be used in accordance with the Broadcom Corporation
license agreement.
This data sheet (including, without limitation, the Broadcom component(s) identified herein) is not designed,
intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations,
pollution control, hazardous substances management, or other high risk application. BROADCOM PROVIDES
THIS DATA SHEET "AS-IS", WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS ALL WARRANTIES,
EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT.
Broadcom Corporation
5300 California Avenue
Irvine, CA 92617
© 2013 by Broadcom Corporation
All rights reserved
Printed in the U.S.A.
20730-DS101-R
6/25/10
Added:
• “Shutter Control for 3D Glasses” on page 10.
• “Infrared Modulator” on page 10.
• “Infrared Learning” on page 11.
• “Triac Control” on page 12.
• “Broadcom Proprietary Control Signalling and Triggered Baseband
Fast Connect” on page 12.
• Figure 5: “Internal Reset Timing,” on page 17.
• Figure 6: “External Reset Timing,” on page 17.
• Figure 10: “40-pin QFN Ball Map,” on page 33.
• Figure 11: “64-pin BGA Ball Map,” on page 34.
• “SPI Timing” on page 41.
• Figure 16: “40-pin QFN,” on page 44.
• Figure 17: “64-pin FBGA,” on page 45.
Revised:
• “Microprocessor Unit” on page 16.
• Table 6: “Pin Descriptions,” on page 25.
• Table 11: “ADC Specifications,” on page 36.
• Table 14: “Receiver RF Specifications,” on page 38.
• Table 15: “Transmitter RF Specifications,” on page 39.
• Table 21: “Ordering Information,” on page 50.
20730-DS100-RI
4/27/10
Initial release.
Revision
Date
Change Description


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