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SA8027 Datasheet(Fiches technique) 2 Page - NXP Semiconductors

Numéro de pièce SA8027
Description  2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer
Télécharger  22 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
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Philips Semiconductors
Product data
SA8027
2.5 GHz low voltage, low power
RF fractional-N/IF integer frequency synthesizer
2
2001 Aug 21
853–2244 26947
GENERAL DESCRIPTION
The SA8027 BICMOS device integrates programmable dividers,
charge pumps and phase comparators to implement phase-locked
loops. The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 3 V supplies.
The synthesizer operates at VCO input frequencies up to 2.5 GHz.
The synthesizer has fully programmable main, auxiliary and
reference dividers. All divider ratios are supplied via a 3-wire serial
programming bus. The main divider is a fractional-N divider with
programmable integer ratios from 512 to 65535.
Separate power and ground pins are provided to the charge pumps
and digital circuits. The ground pins should be externally connected
to prevent large currents from flowing across the die and causing
damage. VDDCP must be equal to or greater than VDD.
The charge pump current (gain) is fully programmable, while ISET is
set by an external resistance at the RSET pin (refer to section 1.5,
Main Output Charge Pumps and Fractional Compensation
Currents). The phase/frequency detector charge pump outputs allow
for implementing a passive loop filter.
FEATURES
Low phase noise
Low power
Fully programmable main and auxiliary dividers
Programmable Normal & Integral charge pumps outputs
Fast Locking Adaptive mode design
Internal fractional spurious compensation
Hardware and software power down
Split supply for V
DD and VDDCP
Loop filter bandwidth programmability
APPLICATIONS
500 to 2500 MHz wireless equipment
Cellular phones (all standards)
WLAN
Portable battery-powered radio equipment.
SR01649
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
LOCK
TEST
VDD
GND
RFin+
RFin–
GNDCP
PHP
PHI
GNDCP
PON
STROBE
DATA
CLOCK
REFin+
REFin–
RSET
AUXin
VDDCP
PHA
10
Figure 1.
TSSOP20 Pin Configuration
13
7
2
3
4
5
6
TOP VIEW
1
8
9
10
11
12
14
15
16
17
18
19
20
21
22
23
24
CLOCK
REFin+
REFin–
SR02176
N/C
VDDPre
GND
GNDPre
RFin+
RFin–
GNDCP
VDDCP
RSET
Figure 2.
HBCC24 Pin configuration
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDD
Supply voltage
2.7
3.6
V
VDDCP
Analog supply voltage
VDDCP w VDD
2.7
3.6
V
IDDCP+IDD
Supply current
Main and Aux. on
7.7
mA
IDDCP+IDD
Total supply current in power-down mode
1
µA
fVCO
Input frequency
500
2500
MHz
fAUX
Input frequency
100
550
MHz
fREF
Crystal reference input frequency
5
40
MHz
fPC
Maximum phase comparator frequency
4
MHz
Tamb
Operating ambient temperature
–40
+85
°C
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
SA8027DH
TSSOP20
Plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
SA8027W
HBCC24
Plastic, heatsink bottom chip carrier; 24 terminals; body 4 x 4 x 0.65 mm (Note 1)
SOT564-1
NOTE:
1. The SA8027W will be released for production Q2, 2001.




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