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MAX1126 Datasheet(Fiches technique) 6 Page - Maxim Integrated Products

Numéro de pièce MAX1126
Description  Quad, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs
Télécharger  25 Pages
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Fabricant  MAXIM [Maxim Integrated Products]
Site Internet  http://www.maxim-ic.com
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 6 page
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Quad, 12-Bit, 40Msps, 1.8V ADC with
Serial LVDS Outputs
6
_______________________________________________________________________________________
Note 1: Specifications at TA
≥ +25°C are guaranteed by production testing. Specifications at TA < +25°C are guaranteed by design
and characterization and not subject to production testing.
Note 2: See definition in the Parameter Definitions section.
Note 3: The MAX1126 internally sets the common-mode voltage to 0.6V (typ) (see Figure 1). The common-mode voltage can be
overdriven to between 0.55V and 0.85V.
Note 4: Limited by MAX1127EVKIT input circuitry.
Note 5: Connect INTREF to GND directly to enable internal reference mode. Connect INTREF to AVDD directly to disable the internal
bandgap reference and enable external reference mode.
Note 6: Data valid to CLKOUT rise/fall timing is measured from 50% of data output level to 50% of clock output level.
Note 7: Guaranteed by design and characterization. Not subject to production testing.
Note 8: Sample CLK Rise to FRAME RISE timing is measured from 50% of sample clock input level to 50% of FRAME output level.
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = 1.8V, OVDD = 1.8V, CVDD = 1.8V, GND = 0, external VREFIO = 1.24V, INTREF = AVDD, CREFIO to GND = 0.1µF,
fCLK = 40MHz (50% duty cycle), DT = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25
°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CHANNEL-TO-CHANNEL MATCHING
Crosstalk
(Note 2)
-90
dB
Gain Matching
fIN = 19.3MHz (Note 2)
±0.1
dB
Phase Matching
fIN = 19.3.MHz (Note 2)
±1
Degrees




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