MC10EL51, MC100EL51

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2

1

2

3

45

6

7

8

Q

Figure 1. Logic Diagram and Pinout Assignment

D

Q

CLK

CLK

R

D

R

Table 1. TRUTH TABLE

D*

L

H

X

R*

L

L

H

CLK*

Z

Z

X

Q**

L

H

L

Z = LOW to HIGH Transition

R

ECL Reset Input

D

ECL Data Input

CLK, CLK

ECL Clock Inputs

Q, Q

ECL Data Outputs

Positive Supply

Negative Supply

Table 2. PIN DESCRIPTION

* Pin will default low when left open.

**Pin will default low when inputs are left open.

PIN

FUNCTION

Table 3. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

PECL Mode Power Supply

8

V

NECL Mode Power Supply

−8

V

PECL Mode Input Voltage

NECL Mode Input Voltage

6

−6

V

Output Current

Continuous

Surge

50

100

mA

Operating Temperature Range

−40 to +85

°C

Storage Temperature Range

−65 to +150

°C

Thermal Resistance (Junction-to-Ambient)

0 lfpm

500 lfpm

SOIC−8NB

190

130

°C/W

Thermal Resistance (Junction-to-Case)

Standard Board

SOIC−8NB

41 to 44

°C/W

Thermal Resistance (Junction-to-Ambient)

0 lfpm

500 lfpm

TSSOP−8

185

140

°C/W

Thermal Resistance (Junction-to-Case)

Standard Board

TSSOP−8

41 to 44 ± 5%

°C/W

Wave Solder (Pb-Free)

<2 to 3 sec @ 260°C

265

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)