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TSB83AA22C Fiches technique(PDF) 6 Page - Texas Instruments |
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TSB83AA22C Fiches technique(HTML) 6 Page - Texas Instruments |
6 / 115 page www.ti.com TSB83AA22C IEEE Std 1394b-2002 PHY and OHCI Link Device SLLS802 – FEBRUARY 2007 List of Tables 3-1 Base Register Configuration ..................................................................................................... 29 3-2 Base Register Field Descriptions ............................................................................................... 29 3-3 Page-0 (Port-Status) Register Configuration .................................................................................. 31 3-4 Page-0 (Port-Status) Register Field Descriptions ............................................................................. 32 3-5 Page 1 (Vendor ID) Register Configuration ................................................................................... 33 3-6 Page 1 (Vendor ID) Register Field Descriptions .............................................................................. 34 3-7 Page 7 (Vendor-Dependent) Register Configuration ......................................................................... 34 3-8 Page 7 (Vendor-Dependent) Register Field Descriptions ................................................................... 34 4-1 Power Class Descriptions ........................................................................................................ 35 5-1 CTL Encoding When PHY Section Has Control of the Bus ................................................................. 41 5-2 CTL Encoding When LLC Section Has Control of the Bus .................................................................. 41 5-3 Request Stream Bit Length ...................................................................................................... 42 5-4 Request-Type Encoding .......................................................................................................... 42 5-5 Bus Request ....................................................................................................................... 43 5-6 Bus-Request Format Encoding .................................................................................................. 43 5-7 Bus-Request Speed Encoding .................................................................................................. 43 5-8 Read Register Request .......................................................................................................... 43 5-9 Write Register Request ........................................................................................................... 44 5-10 Link Notification Request ......................................................................................................... 44 5-11 Status Bits .......................................................................................................................... 45 5-12 PHY Status Transfer Encoding .................................................................................................. 46 5-13 Register Read (Solicited and Unsolicited) PHY Status Transfer Encoding ............................................... 46 5-14 Receive Speed Codes and Format ............................................................................................. 48 5-15 Link-Request-Type Encoding During Packet Transmission ................................................................. 49 5-16 Link-Request Speed-Code Encoding During Packet Transmission ........................................................ 49 5-17 Link-Request Format Encoding During Packet Transmission ............................................................... 50 5-18 Subaction End-Notification Encoding During Packet Transmission ........................................................ 50 5-19 Format Type During Grant Cycle ............................................................................................... 50 5-20 Grant Type Values During Grant Cycle ........................................................................................ 50 5-21 Speed Type Values During Grant Cycle ....................................................................................... 50 6-1 Bit Field Access Tag Descriptions .............................................................................................. 51 6-2 PCI Configuration Register Map ................................................................................................ 51 6-3 Command Register Description ................................................................................................. 53 6-4 Status Register Description ...................................................................................................... 54 6-5 Revision ID Register Description ................................................................................................ 54 6-6 Class Code Register Description ............................................................................................... 55 6-7 Cache Line Size Register Description .......................................................................................... 56 6-8 Latency Timer Register Description ............................................................................................ 56 6-9 Header Type Register Description .............................................................................................. 56 List of Tables 6 Submit Documentation Feedback |
Numéro de pièce similaire - TSB83AA22C |
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Description similaire - TSB83AA22C |
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