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TSC2006IRTJTG4 Fiches technique(PDF) 5 Page - Texas Instruments |
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TSC2006IRTJTG4 Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 50 page PIN CONFIGURATION X Y SNSGND NC - - CS TSC2006 16 17 18 19 20 10 9 8 7 6 ThermalPad 1 2 3 4 5 15 14 13 12 11 AGND AUX NC I/OVDD DGND TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C – JUNE 2007 – REVISED MARCH 2009 RTJ PACKAGE(1) QFN-20 (TOP VIEW) (1) The thermal pad is internally connected to SUBGND. The thermal pad can be connected to the analog ground or left floating. Keep the thermal pad separate from the digital ground, if possible. PIN ASSIGNMENTS PIN PIN NO. NAME I/O A/D DESCRIPTION 1 SDO I/O D Serial data output. This output is the MISO signal for the SPI protocol. 2 SCLK I D Serial clock input 3 SDI I D Serial data input. This input is the MOSI signal for the SPI protocol. 4 PINTDAV O D Interrupt output. Data available or PENIRQ, depending on setting. Pin polarity with active low. 5 RESET I D System reset. All register values reset to default values. 6 DGND Digital ground 7 I/OVDD Digital I/O interface voltage 8, 19 NC No connection 9 AUX I A Auxiliary channel input 10 AGND Analog ground 11 VREF I A External reference input 12 SNSVDD Power supply for sensor drivers and other analog blocks 13 X+ I A X+ channel input 14 Y+ I A Y+ channel input 15 SUBGND Substrate ground (for ESD current) 16 X– I A X– channel input 17 Y– I A Y– channel input 18 SNSGND Sensor driver return 20 CS I D Chip select. This input is the slave select (SS) signal for the SPI protocol. Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TSC2006 |
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