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ST8004 Fiches technique(PDF) 8 Page - STMicroelectronics |
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ST8004 Fiches technique(HTML) 8 Page - STMicroelectronics |
8 / 19 page ST8004 8/19 OFF OUTPUTS (PIN OFF IS AN OPEN DRAIN WITH AN INTERNAL 20 k Ω PULL-UP RESISTOR TO VDD); (see note 5) (VDD =3.3V, VDDP =5V, fXTAL = 10MHz, unless otherwise noted. Typical values are to Ta = 25°C) PROTECTION (VDD =3.3V, VDDP =5V, fXTAL = 10MHz, unless otherwise noted. Typical values are to Ta = 25°C) TIMING (VDD =3.3V, VDDP =5V, fXTAL = 10MHz, unless otherwise noted. Typical values are to Ta =25°C) Note 1: To meet these specifications VCC should be decoupled to CGND using two ceramic multiplier capacitors of low ESR with values of 100nF. Note 2: Thetransitiontimeand duty cyclefactor are showninfigure7; d =t1/(t1+t2). Note 3: PRES and CMDVCC are active Low; RSTIN and PRES are active High Note 4: Referred to the paragraph "CLOCK CIRCUITRY" Note 5: See paragraph "FAULT DETECTION". Figure 1 : Alarm as a function of VDD (tW =10 ms), VTHSEL =VDD or floating Symbol Parameter Test Conditions Min. Typ. Max. Unit VOL Low Level Output Voltage IOL =2 mA 0.4 V VOH High Level Output Voltage IOH = -15 µA 0.75 VDD V Symbol Parameter Test Conditions Min. Typ. Max. Unit TSD Shut down temperature 135 °C ICC(SD) Shut down current at VCC 150 mA Symbol Parameter Test Conditions Min. Typ. Max. Unit tACT Activation sequence duration (See Fig. 3) 180 220 µs tDE Deactivation sequence duration (See Fig. 4) 60 80 100 µs t3 Start of the windows to send CLK to card (See Fig. 3) 130 µs t5 End of the windows to send CLK to card (See Fig. 3) 140 µs |
Numéro de pièce similaire - ST8004 |
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Description similaire - ST8004 |
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