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TPS40051PWP Fiches technique(PDF) 9 Page - Texas Instruments

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No de pièce TPS40051PWP
Description  WIDE-INPUT SYNCHRONOUS BUCK CONTROLLER
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS40051PWP Fiches technique(HTML) 9 Page - Texas Instruments

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TPS40050
TPS40051
TPS40053
SLUS540F − DECEMBER 2002 − REVISED JUNE 2004
www.ti.com
9
Figure 2
fSW − Switching Frequency − kHz
SWITCHING FREQUENCY
vs
TIMING RESISTANCE
0
100
0
200
400
600
800
1000
200
300
400
500
600
100
0
200
300
400
500
600
200
400
600
800
1000
100
700
300
500
700
900
FEED-FORWARD IMPEDANCE
vs
SWITCHING FREQUENCY
Figure 3
fSW − Switching Frequency − kHz
VIN = 25 V
VIN = 15 V
VIN = 9 V
UVLO OPERATION
The TPS4005x uses variable (user programmable) UVLO protection. The UVLO circuit holds the soft-start low
until the input voltage has exceeded the user programmable undervoltage threshold.
The TPS4005x uses the feed-forward pin, KFF, as a user programmable low-line UVLO detection. This variable
low-line UVLO threshold compares the PWM ramp duration to the oscillator clock period. An undervoltage
condition exists if the TPS4005x receives a clock pulse before the ramp has reached 90% of its full amplitude.
The ramp duration is a function of the ramp slope, which is directly related to the current into the KFF pin. The
KFF current is a function of the input voltage and the resistance from KFF to the input voltage. The KFF resistor
can be referenced to the oscillator frequency as descibed in equation (3):
R
KFF + VIN (min) * 3.5
58.14
R
T ) 1340
W
where:.
D VIN is the desired start-up (UVLO) input voltage
D RT is the timing resistance in kΩ
The variable UVLO function uses a three−bit full adder to prevent spurious shut-downs or turn-ons due to spikes
or fast line transients. When the adder reaches a total of seven counts in which the ramp duration is shorter
than the clock cycle a powergood signal is asserted and a soft-start initiated, and the upper and lower
MOSFETS are turned off.
(3)


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