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TPS51116PWP Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS51116PWP Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 29 page www.ti.com TPS51116 SLUS609A – MAY 2004 – REVISED JUNE 2004 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range, V V5IN = 5 V, VLDOIN is connected to VDDQ output (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PROTECTIONS VPGND-CS , PGOOD = HI, VCS < 0.5 V 50 60 70 VOCL Current limit threshold mV VPGND-CS , PGOOD = LO, VCS < 0.5 V 20 30 40 TA = 25°C, VCS > 4.5 V, PGOOD = HI 9 10 11 ITRIP Current sense sink current µA TA = 25°C, VCS > 4.5 V, PGOOD = LO 4 5 6 TRIP current temperature co- RDS(on) sense scheme, On the basis TCITRIP 4500 ppm/ °C efficient of TA = 25°C (3) Overcurrent protection (VV5IN-CS - VPGND-LL), VV5IN-CS = 60 mV, VOCL(off) -5 0 5 COMP offset VCS > 4.5 V mV Current limit threshold setting VR(trip) VV5IN-CS (3) 30 150 range POWERGOOD COMPARATOR PG in from lower 93% 95% 97% VTVDDQPG VDDQ powergood threshold PG in from higher 103% 105% 107% PG hysteresis 5% IPG(max) PGOOD sink current VVTT = 0 V, VPGOOD = 0.5 V 2.5 7.5 mA TPG(del) PGOOD delay time Delay for PG in 80 130 200 µs UNDERVOLTAGE LOCKOUT/LOGIC THRESHOLD Wake up 3.7 4.0 4.3 V5IN UVLO threshold volt- VUVV5IN age Hysteresis 0.2 0.3 0.4 No discharge 4.7 VTHMODE MODE threshold Non-tracking discharge 0.1 2.5 V output 0.08 0.15 0.25 V VTHVDDQSET VDDQSET threshold voltage 1.8 V output 3.5 4.0 4.5 VIH High-level input voltage S3, S5 2.2 VIL Low-level input voltage S3, S5 0.3 VIHYST Hysteresis voltage S3, S5 0.2 VINLEAK Logic input leakage current S3, S5, MODE -1 1 µA VINVDDQSET Input leakage/ bias current VDDQSET -1 1 UNDERVOLTAGE AND OVERVOLTAGE PROTECTION OVP detect 110% 115% 120% VDDQ OVP trip threshold VOVP voltage Hysteresis 5% VDDQ OVP propagation de- TOVPDEL 1.5 µs lay (3) UVP detect 70% VUVP Output UVP trip threshold Hysteresis 10% Output UVP propagation de- TUVPDEL 32 lay(3) cycle TUVPEN Output UVP enable delay(3) 1007 THERMAL SHUTDOWN Shutdown temperature 160 TSDN Thermal SDN threshold (3) °C Hysteresis 10 (3) Ensured by design. Not production tested. 5 |
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