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M38B57MC Fiches technique(PDF) 57 Page - Mitsubishi Electric Semiconductor |
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M38B57MC Fiches technique(HTML) 57 Page - Mitsubishi Electric Semiconductor |
57 / 69 page MITSUBISHI MICROCOMPUTERS 38B5 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 57 PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change. Clock Generating Circuit The 38B5 group has two built-in oscillation circuits. An oscillation circuit can be formed by connecting a resonator between XIN and XOUT (XCIN and XCOUT). Use the circuit constants in accordance with the resonator manufacturer's recommended values. No external resistor is needed between XIN and XOUT since a feedback resistor exists on-chip. However, an external feedback resistor is needed between XCIN and XCOUT. Immediately after power on, only the XIN oscillation circuit starts oscillating, and XCIN and XCOUT pins function as I/O ports. qFrequency control (1) Middle-speed mode The internal system clock is the frequency of XIN divided by 4. After reset, this mode is selected. (2) High-speed mode The internal system clock is the frequency of XIN. (3) Low-speed mode The internal system clock is the frequency of XCIN divided by 2. sNote If you switch the mode between middle/high-speed and low-speed, stabilize both XIN and XCIN oscillations. The sufficient time is required for the sub clock to stabilize, especially immediately after power on and at returning from stop mode. When switching the mode between middle/high-speed and low-speed, set the frequency on condition that f(XIN) > 3f(XCIN). (4) Low power consumption mode The low power consumption operation can be realized by stopping the main clock XIN in low-speed mode. To stop the main clock, set bit 5 of the CPU mode register to “1.” When the main clock XIN is re- started (by setting the main clock stop bit to “0”), set enough time for oscillation to stabilize. By clearing furthermore the XCOUT drivability selection bit (b3) of CPU mode register to “0,” low power consumption operation of less than 200 µA (f(XCIN) = 32 kHz) can be realized by reducing the drivability between XCIN and XCOUT. At reset or during STP instruction execu- tion this bit is set to “1” and a strong drivability that has an easy oscillation start is set. qOscillation control (1) Stop mode If the STP instruction is executed, the internal system clock stops at an “H” level, and XIN and XCIN oscillators stop. Timer 1 is set to “FF16” and timer 2 is set to “0116.” Either XIN divided by 8 or XCIN divided by 16 is input to timer 1 as count source, and the output of timer 1 is connected to timer 2. The bits of the timer 12 mode register are cleared to “0.” Set the interrupt enable bits of the timer 1 and timer 2 to disabled (“0”) before execut- ing the STP instruction. Oscillator restarts when an external interrupt is received, but the internal system clock is not supplied to the CPU until timer 1 underflows. This allows time for the clock circuit oscilla- tion to stabilize. (2) Wait mode If the WIT instruction is executed, the internal system clock stops at an “H” level. The states of XIN and XCIN are the same as the state before executing the WIT instruction. The internal system clock re- starts at reset or when an interrupt is received. Since the oscillator does not stop, normal operation can be started immediately after the clock is restarted. Fig. 68 Ceramic Resonator Circuit Fig. 69 External Clock Input Circuit XIN XOUT External oscillation circuit VCC VSS open XCIN XCOUT External oscillation circuit or external pulse open VCC VSS XCIN XCOUT XIN XOUT CIN COUT CCIN CCOUT Rf Rd |
Numéro de pièce similaire - M38B57MC |
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Description similaire - M38B57MC |
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