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TPD2E2U06 Fiches technique(PDF) 7 Page - Texas Instruments |
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TPD2E2U06 Fiches technique(HTML) 7 Page - Texas Instruments |
7 / 17 page GND IO1 IO2 TPD2E2U06 www.ti.com SLLSEG9B – JUNE 2013 – REVISED MAY 2015 8 Detailed Description 8.1 Overview The TPD2E2U06 is a dual-channel low capacitance TVS diode ESD protection device. The device offers ±25-kV contact and ±30-kV air-gap ESD protection in accordance with the IEC 61000-4-2 standard. The 1.5-pF line capacitance of the TPD2E2U06 makes the device suitable for a wide range of applications. Typical application interfaces are USB 2.0, LVDS, and I2C. 8.2 Functional Block Diagram 8.3 Feature Description The TPD2E2U06 is a dual-channel low capacitance TVS diode ESD protection device. The device offers ±25-kV contact and ±30-kV air-gap ESD protection in accordance with the IEC 61000-4-2 standard. The 1.5-pF line capacitance of the TPD2E2U06 makes the device suitable for a wide range of applications. Typical application interfaces are USB 2.0, LVDS, and I2C. 8.3.1 IEC 61000-4-2 Level 4 The I/O pins can withstand ESD events up to ±25-kV contact and ±30-kV air. An ESD/surge clamp diverts the current to ground. 8.3.2 IO Capacitance The capacitance between each I/O pin to ground is 1.5 pF. These capacitances support data rates in excess of 1.5 Gbps. 8.3.3 DC Breakdown Voltage The DC breakdown voltage of each I/O pin is a minimum of 6.5 V. This ensures that sensitive equipment is protected from surges above the reverse standoff voltage of 5.5 V. 8.3.4 Ultra-Low Leakage Current The I/O pins feature an ultra-low leakage current of 10 nA (Max) with a bias of 2.5 V. 8.3.5 Low ESD Clamping Voltage The I/O pins feature an ESD clamp that is capable of clamping the voltage to 9.7 V (IPP = 1 A). Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TPD2E2U06 |
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