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UC2854BN Fiches technique(PDF) 3 Page - Texas Instruments |
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UC2854BN Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 18 page www.ti.com RECOMMENDED OPERATING CONDITIONS THERMAL RESISTANCE UC1854A UC2854A, UC2854B UC3854A, UC3854B SLUS329E – MONTH 2003 – REVISED JANUARY 2008 over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage 10 20 V UC1854X –55 125 TJ Operating junction temperature UC2854X –40 85 °C UC3854X 0 70 PACKAGED DEVICES RESISTANCES CDIP-16 PDIP-16 SOP-16 PLCC-20 (J) (N) (DW) (Q) θ JC (°C/W) 28(1) 45 27 34 θ JA (°C/W) 80–120 90(2) 50–130(2) 43–75(2) (1) θ JC data values stated are derived from MIL-STD-1835B which states gthe baseline values shown are worst case (mean +2s) for a 60 × 60 mil microcircuit device silicon die and applicable for devices with die sizes up to 14,400 square mils. For device die sizes greater than 14,400 square mils use the following values, dual-in-line, 11 °C/W; flat pack and pin grid array, 10°C/W.are at the end of each trace. (2) θ JA (junction-to-ambient) applies to devices mounted to five square inch FR4 PC board with one ounce copper where noted. When resitance range is given, lower values are for five square inch aluminum PC board. Test PWB is 0.062 inches thick and typically uses 0,635 mm trace widths for power packages and 1,3 mm trace widths for non-power packages with a 100 × 100 mil probe land are at the end of each trace. Copyright © 2003–2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): UC1854A UC2854A, UC2854B UC3854A, UC3854B |
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