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SN74AUP1G34DSFR Fiches technique(PDF) 9 Page - Texas Instruments

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No de pièce SN74AUP1G34DSFR
Description  Low-Power Single Buffer Gate
Download  33 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

SN74AUP1G34DSFR Fiches technique(HTML) 9 Page - Texas Instruments

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NOTES: A.CL includesprobeandjigcapacitance.
B.Waveform1isforanoutputwithinternalconditionssuchthattheoutputislow,exceptwhendisabledbytheoutputcontrol.
C. Allinputpulsesaresuppliedbygeneratorshavingthefollowingcharacteristics:PRR
10MHz,Z =50
,t /t =3ns.
£
W
O
r f
D. Theoutputsaremeasuredoneatatime,withonetransitionpermeasurement.
E.t
andt
arethesameast .
PLZ
PHZ
dis
F.t
andt
arethesameast .
PZL
PZH
en
G. Allparametersandwaveformsarenotapplicabletoalldevices.
5,10,15,30pF
V
/2
CC
V
CC
0.15V
V
=1.2V
CC
± 0.1V
V
=0.8V
CC
V
=1.5V
CC
± 0.1V
V
=1.8V
CC
± 0.15V
V
=2.5V
CC
± 0.2V
V
=3.3V
CC
± 0.3V
5,10,15,30pF
V
/2
CC
V
CC
0.1V
5,10,15,30pF
V
/2
CC
V
CC
0.1V
5,10,15,30pF
V
/2
CC
V
CC
0.1V
C
L
V
M
V
I
V
D
5,10,15,30pF
V
/2
CC
V
CC
0.15V
5,10,15,30pF
V
/2
CC
V
CC
0.3V
Output
Waveform1
S1at2
V
´ CC
(seeNoteB)
Output
Waveform2
S1atGND
(seeNoteB)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
V
CC
0V
V
+V
OL
D
V
V
OH -
D
»0V
V
CC
VOLTAGEWAVEFORMS
ENABLE ANDDISABLETIMES
LOW- ANDHIGH-LEVEL ENABLING
Output
Control
V
/2
CC
V
/2
CC
V
/2
CC
V
/2
CC
t
/t
PLZ PZL
t
/t
PHZ PZH
2
V
´ CC
GND
TEST
S1
FromOutput
UnderTest
C
L
(seeNote A)
LOADCIRCUIT
S1
GND
5kW
5kW
2
V
´ CC
Waveform2isforanoutputwithinternalconditionssuchthattheoutputishigh,exceptwhendisabledbytheoutputcontrol.
SN74AUP1G34
www.ti.com
SCES603K – AUGUST 2004 – REVISED OCTOBER 2014
8.2
Enable and Disable Times
Figure 4. Load Circuit and Voltage Waveforms
Copyright © 2004–2014, Texas Instruments Incorporated
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