SN74ALS746

OCTAL BUFFER AND LINE DRIVER

WITH INPUT PULLUP RESISTORS

SDAS052A − AUGUST 1984 − REVISED JANUARY 1995

Copyright

1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Memory Address Registers

Termination

Opposite Side From Outputs)

Small-Outline (DW) Packages and Standard

Plastic (N) 300-mil DIPs

description

This octal buffer and line driver is designed to have

the performance of the

′ALS240A and, at the

same time, offers a pinout with inputs and outputs

on opposite sides of the package. This arrangement facilitates printed-circuit-board layout. In addition, 20-k

Ω

where the data bus must be at a high level when all other connecting devices are at a high-impedance state.

The 3-state control gate is a 2-input NOR such that if either output-enable (OE1 or OE2) input is high, all eight

outputs are in the high-impedance state.

The SN74ALS746 provides inverted data at the outputs.

The SN74ALS746 is characterized for operation from 0

°C to 70°C.

logic diagram (positive logic)

Y1

18

Y2

17

Y3

16

Y4

15

2

A1

3

A2

4

A3

5

A4

1

2

18

Y1

1

OE1

6

A5

7

A6

8

A7

9

A8

Y5

14

Y6

13

Y7

12

Y8

11

19

OE2

&

19

OE1

OE2

VCC

A1

20

To Seven Other Channels

EN

All input pullup resistors are 20 k

Ω.

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OE1

A1

A2

A3

A4

A5

A6

A7

A8

GND

OE2

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

DW OR N PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.