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CD54HCT573F Fiches technique(PDF) 1 Page - Texas Instruments

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No de pièce CD54HCT573F
Description  OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

CD54HCT573F Fiches technique(HTML) 1 Page - Texas Instruments

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CD54HCT573, CD74HCT573
OCTAL TRANSPARENT DTYPE LATCHES
WITH 3STATE OUTPUTS
SCLS455C − FEBRUARY 2001 − REVISED MAY 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 4.5-V to 5.5-V VCC Operation
D Wide Operating Temperature Range of
−55
°C to 125°C
D Balanced Propagation Delays and
Transition Times
D Standard Outputs Drive Up To 10 LS-TTL
Loads
D Significant Power Reduction Compared to
LS-TTL Logic ICs
D Inputs Are TTL-Voltage Compatible
description/ordering information
The ’HCT573 devices are octal transparent
D-type latches. When the latch-enable (LE) input
is high, the Q outputs follow the data (D) inputs.
When LE is low, the Q outputs are latched at the
logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − E
Tube
CD74HCT573E
CD74HCT573E
SSOP − DB
Tape and reel
CD74HCT573DBR
HK573
−55
°C to 125°C
SOIC − M
Tube
CD74HCT573M
HCT573M
−55 C to 125 C
SOIC − M
Tape and reel
CD74HCT573M96
HCT573M
CDIP − F
Tube
CD54HCT573F3A
CD54HCT573F3A
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright
 2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
CD54HCT573 ...F PACKAGE
CD74HCT573 . . . DB, E, OR M PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
On products compliant to MILPRF38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.


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