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74LVC2G38DP Fiches technique(PDF) 7 Page - NXP Semiconductors

No de pièce 74LVC2G38DP
Description  Dual 2-input NAND gate (open drain)
Download  15 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC2G38DP Fiches technique(HTML) 7 Page - NXP Semiconductors

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2004 Oct 18
7
Philips Semiconductors
Product specification
Dual 2-input NAND gate (open drain)
74LVC2G38
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
VIH
HIGH-level input voltage
1.65 to 1.95
0.65
× VCC −−
V
2.3 to 2.7
1.7
−−
V
2.7 to 3.6
2.0
−−
V
4.5 to 5.5
0.7
× V
CC
−−
V
VIL
LOW-level input voltage
1.65 to 1.95
−−
0.35
× VCC V
2.3 to 2.7
−−
0.7
V
2.7 to 3.6
−−
0.8
V
4.5 to 5.5
−−
0.3
× VCC
V
VOL
LOW-level output voltage VI =VIH or VIL
IO = 100 µA
1.65 to 5.5
−−
0.1
V
IO = 4 mA
1.65
0.08
0.45
V
IO = 8 mA
2.3
0.14
0.3
V
IO = 12 mA
2.7
0.19
0.4
V
IO = 24 mA
3.0
0.37
0.55
V
IO = 32 mA
4.5
0.43
0.55
V
ILI
input leakage current
VI = 5.5 V or GND
5.5
−±0.1
±5
µA
Ioff
power OFF leakage
current
VI or VO = 5.5 V
0
−±0.1
±10
µA
ICC
quiescent supply current
VI =VCC or GND;
IO =0A
5.5
0.1
10
µA
∆ICC
additional quiescent
supply current per pin
VI =VCC − 0.6 V;
IO =0A
2.3 to 5.5
5
500
µA


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