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74LVC2G38DP Fiches technique(PDF) 6 Page - NXP Semiconductors

No de pièce 74LVC2G38DP
Description  Dual 2-input NAND gate (open drain)
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC2G38DP Fiches technique(HTML) 6 Page - NXP Semiconductors

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2004 Oct 18
6
Philips Semiconductors
Product specification
Dual 2-input NAND gate (open drain)
74LVC2G38
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
1.65
5.5
V
VI
input voltage
0
5.5
V
VO
output voltage
active mode
0
VCC
V
VCC = 1.65 V to 5.5 V; disable
mode
0
5.5
V
VCC = 0 V; Power-down mode
0
5.5
V
Tamb
operating ambient temperature
−40
+125
°C
tr, tf
input rise and fall times
VCC = 1.65 V to 2.7 V
0
20
ns/V
VCC = 2.7 V to 5.5 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
−0.5
+6.5
V
IIK
input diode current
VI <0V
−−50
mA
VI
input voltage
note 1
−0.5
+6.5
V
IOK
output diode current
VO >VCC or VO <0V
−±50
mA
VO
output voltage
active mode; notes 1 and 2
−0.5
+6.5
V
Power-down mode; notes 1 and 2
−0.5
+6.5
V
IO
output source or sink current
VO =0VtoVCC
−±50
mA
ICC, IGND
VCC or GND current
−±100
mA
Tstg
storage temperature
−65
+150
°C
PD
power dissipation
Tamb = −40 °C to +125 °C
300
mW


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