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74LCX139TTR Fiches technique(PDF) 1 Page - STMicroelectronics

No de pièce 74LCX139TTR
Description  LOW VOLTAGE CMOS DUAL 2 TO 4 DECODER/DEMULTIPLEXER
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

74LCX139TTR Fiches technique(HTML) 1 Page - STMicroelectronics

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September 2004
s
5V TOLERANT INPUTS
s
HIGH SPEED:
tPD = 6.2ns (MAX.) at VCC = 3V
s
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN) at VCC = 3V
s
PCI BUS LEVELS GUARANTEED AT 24 mA
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 139
s
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
s
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX139 is a low voltage CMOS DUAL 2
TO
4
LINE
DECODER/DEMULTIPLEXER
fabricated
with
sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
It is ideal for low power and high speed 3.3V
applications; it can be interfaced to 5V signal
environment for inputs.
The active low enable input can be used for gating
or as a data input for demultiplexing applications.
While the enable input is held high, all four outputs
are high independently of the other inputs.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All
inputs
and
outputs
are
equipped
with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX139
LOW VOLTAGE CMOS
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
74LCX139MTR
TSSOP
74LCX139TTR
TSSOP
SOP
Rev. 3


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