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74FCT16543ATPACTE4 Fiches technique(PDF) 1 Page - Texas Instruments

No de pièce 74FCT16543ATPACTE4
Description  16-Bit Latched Transceivers
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

74FCT16543ATPACTE4 Fiches technique(HTML) 1 Page - Texas Instruments

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16-Bit Latched Transceivers
SCCS059B - August 1994 - Revised September 2001
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Copyright
© 2001, Texas Instruments Incorporated
Features
•Ioff supports partial-power-down mode operation
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of
−40˚C to +85˚C
•VCC = 5V ± 10%
CY74FCT16543T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
CY74FCT162543T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
CY74FCT162H543T Features:
• Bus hold retains last active state
• Eliminates the need for external pull-up or pull-down
resistors
Functional Description
The
CY74FCT16543T and CY74FCT162543T are 16-bit,
high-speed, low power latched transceivers that are organized as two
independent 8-bit D-type latched transceivers containing two sets of
eight D-type latches with separate Latch Enable (LEAB, LEAB) and
Output Enable (OEAB, OEAB) controls for each set to permit
independent control of inputting and outputting in either direction of
data flow. For data flow from A to B, for example, the A-to-B input
Enable (CEAB) must be LOW in order to enter data from A or to take
data from B as indicated in the truth table. With CAEB LOW, a LOW
signal on the A-to-B Latch Enable (LEAB) makes the A-to-B latches
transparent; a subsequent LOW-to-HIGH transition of the LEAB
signal puts the A latches in the storage mode and their outputs no
longer change with the A inputs. With CEAB and OEAB both LOW,
the three-state B output buffers are active and reflect the data present
at the output of the A latches. Control of data from B to A is similar,
but uses CEAB, LEAB, and OEAB inputs flow-through pinout and
small shrink packaging and in simplifying board design.
This
device
is
fully
specified
for
partial-power-down
applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device
when it is powered down.
The
CY74FCT16543T
is
ideally
suited
for
driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162543T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162543T is ideal for driving transmission lines.
The CY74FCT162H543T is a 24-mA balanced output part that
has “bus hold” on the data inputs. The device retains the
input’s last state whenever the input goes to high impedance.
This eliminates the need for pull-up/down resistors and
prevents floating inputs.


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