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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ADS8910B Fiches technique(PDF) 36 Page - Texas Instruments |
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ADS8910B Fiches technique(HTML) 36 Page - Texas Instruments |
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36 / 68 page  SCLK SDO-0 D21 D20 D1 D0 D21 D20 D20 D19 D1 D1 D0 D0 D21 0 CS D2 D2 RVS SCLK D21 SDO-0 D21 D20 D1 D0 D20 D19 D0 D1 D0 D21 D20 D19 CS D1 RVS SCLK SDO-0 0 D21 D20 D1 D0 D21 D20 D21 D20 D19 D0 D1 D0 CS RVS SCLK SDO-0 D21 D20 D1 D0 D21 D20 D20 D19 D19 D1 D1 D0 D0 D21 CS RVS 36 ADS8910B ADS8912B ADS8914B SBAS707A – JUNE 2016 – REVISED JULY 2016 www.ti.com Product Folder Links: ADS8910B ADS8912B ADS8914B Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.5.4.2 Protocols for Reading From the Device The protocols for the data-read operation can be broadly classified into three categories: 1. Legacy, SPI-compatible (SPI-xy-S) protocol 2. SPI-compatible protocols with bus width options (SPI-xy-D and SPI-xy-Q) 3. Source-synchronous (SRC) protocols 7.5.4.2.1 Legacy, SPI-Compatible (SYS-xy-S) Protocols As shown in Table 5, the host controller can use any of the four legacy, SPI-compatible protocols (SPI-00-S, SPI- 01-S, SPI-10-S, or SPI-11-S) to read data from the device. Table 5. SPI Protocols for Reading From the Device PROTOCOL SCLK POLARITY (At CS Falling Edge) SCLK PHASE (Capture Edge) MSB BIT LAUNCH EDGE SDI_CNTL SDO_CNTL NO. OF SCLK (Optimal Read Frame) TIMING DIAGRAM SPI-00-S Low Rising CS falling 00h 00h 18 Figure 51 SPI-01-S Low Falling 1st SCLK rising 01h 00h 18 Figure 52 SPI-10-S High Falling CS falling 02h 00h 18 Figure 53 SPI-11-S High Rising 1st SCLK falling 03h 00h 18 Figure 54 At power-up or after coming out of any asynchronous reset, the device supports the SPI-00-S protocol for data- read and data-write operations. To select a different SPI-compatible protocol for both the data transfer operations: 1. Program the SDI_MODE[1:0] bits in the SDI_CNTL register. This first write operation must adhere to the SPI- 00-S protocol. Any subsequent data transfer frames must adhere to the newly selected protocol. 2. Set the SDO_MODE[1:0] bits = 00b in the SDO_CNTL register. Figure 51 to Figure 54 explain the details of the four protocols using an optimal command frame to read all 22 bits of the output data word. Table 5 shows the number of SCLK required in an optimal read frame for the different output protocol selections. Figure 51. SPI-00-S Protocol, 22 SCLKs Figure 52. SPI-01-S Protocol, 22 SCLKs Figure 53. SPI-10-S Protocol, 22 SCLKs Figure 54. SPI-11-S Protocol, 22 SCLKs |
Numéro de pièce similaire - ADS8910B |
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Description similaire - ADS8910B |
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