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ADC108S102CIMT Fiches technique(PDF) 2 Page - Texas Instruments

No de pièce ADC108S102CIMT
Description  8-Channel, 500 kSPS to 1 MSPS, 10-Bit A/D Converter
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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ADC108S102CIMT Fiches technique(HTML) 2 Page - Texas Instruments

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IN0
IN7
MUX
T/H
ADC108S102
SCLK
VA
AGND
DGND
VD
CS
DIN
DOUT
CONTROL
LOGIC
10-BIT
SUCCESSIVE
APPROXIMATION
ADC
.
.
.
AGND
ADC108S102
SNAS336B – SEPTEMBER 2005 – REVISED MARCH 2013
www.ti.com
Block Diagram
PIN DESCRIPTIONS and EQUIVALENT CIRCUITS
Pin No.
Symbol
Equivalent Circuit
Description
ANALOG I/O
4 - 11
IN0 to IN7
Analog inputs. These signals can range from 0V to VREF.
DIGITAL I/O
Digital clock input. The specified performance range of frequencies
16
SCLK
for this input is 8 MHz to 16 MHz. This clock directly controls the
conversion and readout processes.
Digital data output. The output samples are clocked out of this pin on
15
DOUT
the falling edges of the SCLK pin.
Digital data input. The ADC108S102's Control Register is loaded
14
DIN
through this pin on rising edges of the SCLK pin.
Chip select. On the falling edge of CS, a conversion process begins.
1
CS
Conversions continue as long as CS is held low.
POWER SUPPLY
Positive analog supply pin. This voltage is also used as the
reference voltage. This pin should be connected to a quiet +2.7V to
2
VA
+5.25V source and bypassed to GND with 1 µF and 0.1 µF
monolithic ceramic capacitors located within 1 cm of the power pin.
Positive digital supply pin. This pin should be connected to a +2.7V
13
VD
to VA supply, and bypassed to GND with a 0.1 µF monolithic ceramic
capacitor located within 1 cm of the power pin.
3
AGND
The ground return for the analog supply and signals.
12
DGND
The ground return for the digital supply and signals.
2
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Product Folder Links: ADC108S102


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