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ADC10D020CIVSX Fiches technique(PDF) 4 Page - Texas Instruments

No de pièce ADC10D020CIVSX
Description  ADC10D020 Dual 10-Bit, 20 MSPS, 150 mW A/D Converter
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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ADC10D020CIVSX Fiches technique(HTML) 4 Page - Texas Instruments

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ADC10D020
SNAS143D – SEPTEMBER 2001 – REVISED MARCH 2013
www.ti.com
PIN DESCRIPTIONS AND EQUIVALENT CIRCUITS (continued)
Pin No.
Symbol
Equivalent Circuit
Description
Digital clock input for both converters. The analog inputs are
33
CLK
sampled on the falling edge of this clock input.
Output Bus Select. With this pin at a logic high, both the “I” and the
“Q” data are present on their respective 10-bit output buses (Parallel
2
OS
mode of operation). When this pin is at a logic low, the “I” and “Q”
data are multiplexed onto the “I” output bus and the “Q” output lines
all remain at a logic low (multiplexed mode).
Offset Correct pin. A low-to-high transition on this pin initiates an
independent offset correction sequence for each converter, which
takes 34 clock cycles to complete. During this time 32 conversions
31
OC
are taken and averaged. The result is subtracted from subsequent
conversions. Each input pair should have 0V differential value during
this entire 34 clock period.
Output Format pin. When this pin is LOW the output format is Offset
Binary. When this pin is HIGH the output format is 2's complement.
32
OF
This pin may be changed asynchronously, but this will result in
errors for one or two conversions.
Standby pin. The device operates normally with a logic low on this
and the PD (Power Down) pin. With this pin at a logic high and the
34
STBY
PD pin at a logic low, the device is in the standby mode where it
consumes just 27 mW of power. It takes just 800 ns to come out of
this mode after the STBY pin is brought low.
Power Down pin that, when high, puts the converter into the Power
Down mode where it consumes less than 1 mW of power. It takes
35
PD
less than 1 ms to recover from this mode after the PD pin is brought
low. If both the STBY and PD pins are high simultaneously, the PD
pin dominates.
This pin sets the internal signal gain at the inputs to the ADCs. With
this pin low the full scale differential input peak-to-peak signal is
36
GAIN
equal to VREF. With this pin high the full scale differential input peak-
to-peak signal is equal to 2 x VREF..
3V TTL/CMOS-compatible Digital Output pins that provide the
conversion results of the I and Q inputs. I0 and Q0 are the LSBs, I9
and Q9 are the MSBs. Valid data is present just after the rising edge
8 thru 27
I0–I9 and Q0–Q9
of the CLK input in the Parallel mode. In the multiplexed mode, I-
channel data is valid on I0 through I9 when the I/Q output is high
and the Q-channel data is valid on I0 through I9 when the I/Q output
is low.
Output data valid signal. In the multiplexed mode, this pin transitions
from low to high when the data bus transitions from Q-data to I-data,
28
I/Q
and from high to low when the data bus transitions from I-data to Q-
data. In the Parallel mode, this pin transitions from low to high as the
output data changes.
Positive analog supply pin. This pin should be connected to a quiet
voltage source of +2.7V to +3.6V. VA and VD should have a common
40, 41
VA
supply and be separately bypassed with 10 µF to 50 µF capacitors in
parallel with 0.1 µF capacitors.
Digital supply pin. This pin should be connected to a quiet voltage
source of +2.7V to +3.6V. VA and VD should have a common supply
4
VD
and be separately bypassed with 10 µF to 50 µF capacitors in
parallel with 0.1 µF capacitors.
Digital output driver supply pins. These pins should be connected to
6, 30
VDR
a voltage source of +1.5V to VD and be bypassed with 10 µF to 50
µF capacitors in parallel with 0.1 µF capacitors.
3, 39, 42,
The ground return for the analog supply. AGND and DGND should
AGND
46
be connected together close to the ADC10D020 package.
The ground return for the digital supply. AGND and DGND should be
5
DGND
connected together close to the ADC10D020 package.
7, 29
DR GND
The ground return of the digital output drivers.
4
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Product Folder Links: ADC10D020


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