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MTV003N Fiches technique(PDF) 10 Page - List of Unclassifed Manufacturers |
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MTV003N Fiches technique(HTML) 10 Page - List of Unclassifed Manufacturers |
10 / 13 page MYSON TECHNOLOGY MTV003N (MTV003) MTV003 Revision 2.3 07/01/1998 10/13 7.0 SWITCHING CHARACTERISTICS (Under Operating Conditions and X1=8MHz) Symbol Parameter Min. Typ. Max. Unit fDAO D/A Converter Output Frequency - 31.25 - KHz fXTAL Crystal Frequency - 8 - MHz fHS HS Input Frequency 15 - 100 KHz fVS VS Input Frequency 20 - 100 Hz tHIPW HS Input Pulse Width 0.5 - 6.5 us tVIPW VS Input Pulse Width 25 - 2000 us HSYNC (Rise) to HBLANK Output Delay (programmed by Reg6) 300 (N+1)xT+500 64xT+850 ns tHHBD HSYNC (Rise) to HBLANK Output Delay (bypass HSYNC to HBLANK Output directly) - - 50 ns HBLANK Output Width (programmed by Reg7) 300 (N+1)xT+500 64xT+850 ns tHBW HBLANK Output Width (bypass HSYNC to HBLANK Output directly) 0.5 - 7 us tHHBJ HSYNC to HBLANK Output Jitter - - (+/-) 25 ns VBLANK Output Width (programmed by Reg9) 16 (Nx16)+8 1016 us tVBW VBLANK Output Width (bypass VSVNC to VBLANK Output directly) 25 - 2000 us tHVBD HSYNC to VBLANK Output Delay (H/V mode) -1 H-line - - tVVBD VS to VBLANK Output Delay (H+V mode) - - 50 ns tVVBJ VSYNC to VBLANK Output Jitter(H+V mode) - - (+/-) 25 ns tHVBJ HSYNC to VBLANK Output Jitter (H/V mode) - - (+/-) 25 ns tCDSU CMDB to DCK Setup Time 200 - - ns tCDH CMDB to DCK Hold Time 100 - - ns tDDSU DIO to DCK Setup Time (write) 200 - - ns tDDH DIO to DCK Hold Time(write) 100 - - ns tDCKH DCK High Time 200 - - ns tDCKL DCK Low Time 200 - - ns TDDD DCK to DIO Delay Time(read) 100 - - ns * 1. The above HSYNC is extracted from HS input and VSYNC is extracted from VS, HS input. * 2. T = 250ns (1/4MHz) is fixed regardless of whether or not an 8(or 4)MHz crystal is used. * 3. 0 < N < 63 |
Numéro de pièce similaire - MTV003N |
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Description similaire - MTV003N |
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