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ADV3224 Fiches technique(PDF) 1 Page - Analog Devices |
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ADV3224 Fiches technique(HTML) 1 Page - Analog Devices |
1 / 24 page 750 MHz, 16 × 8 Analog Crosspoint Switch Data Sheet ADV3224/ADV3225 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2010–2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES 16 × 8 high speed, nonblocking switch array Pinout and functionally equivalent to the AD8110/AD8111 Drop-in compatible with the ADV3228/ADV3229 8 × 8 array Complete solution Buffered inputs Programmable high impedance outputs 8 output amplifiers, G = +1 (ADV3224), G = +2 (ADV3225) Drives 150 Ω loads Operates on ±5 V supplies Low power: 0.5 W Excellent ac performance −3 dB bandwidth 200 mV p-p: 1200 MHz (ADV3224), 900 MHz (ADV3225) 2 V p-p: 750 MHz (ADV3224), 850 MHz (ADV3225) 0.5 dB flatness (2 V p-p) 250 MHz (ADV3224), 235 MHz (ADV3225) Slew rate: 2500 V/μs Serial or parallel programming of switch array 72-lead LFCSP (10 mm × 10 mm) APPLICATIONS Routing of high speed signals including Video (NTSC, PAL, S, SECAM, YUV, RGB) Compressed video (MPEG, wavelet) 3-level digital video (HDB3) Data communications Telecommunications FUNCTIONAL BLOCK DIAGRAM ADV3224/ ADV3225 40 40 128 40-BIT SHIFT REGISTER WITH 4-BIT PARALLEL LOADING PARALLEL LATCH DECODE 8 × 5:16 DECODERS 8 CLK DATAIN UPDATE CE RESET A0 DATAOUT A1 A2 SER/PAR D0 D1 D2 D3 D4 SWITCH MATRIX SET INDIVIDUAL OR RESET ALL OUTPUTS TO OFF OUTPUT BUFFER G = +1, G = +2 Figure 1. GENERAL DESCRIPTION The ADV3224/ADV3225 are high speed 16 × 8 analog crosspoint switch matrices. They offer a −3 dB signal bandwidth of greater than 750 MHz and a high slew rate of greater than 2500 V/μs. The ADV3224/ADV3225 include eight independent output buffers that can be placed into a high impedance state for paralleling crosspoint outputs to prevent off channels from loading the output bus. The ADV3224 has a gain of +1 and the ADV3225 has a gain of +2, and they both operate on voltage supplies of ±5 V. Channel switching is performed via a serial digital control that can accommodate the daisy chaining of several devices or via a parallel control to allow updating of an individual output without reprogramming the entire array. The ADV3224/ADV3225 are available in the 72-lead LFCSP package over the extended industrial temperature range of −40°C to +85°C. |
Numéro de pièce similaire - ADV3224 |
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Description similaire - ADV3224 |
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