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DAC7311IDCKR Fiches technique(PDF) 3 Page - Texas Instruments |
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DAC7311IDCKR Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 39 page 1 2 3 6 5 4 SYNC SCLK D IN V OUT GND AV /V DD REF DAC5311, DAC6311, DAC7311 www.ti.com SBAS442C – AUGUST 2008 – REVISED JULY 2015 5 Device Comparison Table 1. Related Devices RELATED DEVICES 16-BIT 14-BIT 12-BIT 10-BIT 8-BIT Pin and Function Compatible DAC8411 DAC8311 DAC7311 DAC6311 DAC5311 Table 2. Relative Accuracy and Differential Nonlinearity MAXIMUM MAXIMUM RELATIVE DIFFERENTIAL ACCURACY NONLINEARITY DEVICE (LSB) (LSB) DAC5311 ±0.25 ±0.25 DAC6311 ±0.5 ±0.5 DAC7311 ±1 ±1 6 Pin Configuration and Functions DCK Package 6-Pin SC70 Top View Pin Functions PIN I/O DESCRIPTION NAME NO. AVDD/VREF 4 I Power supply input, +2.0 V to +5.5 V. Serial Data Input. Data are clocked into the 16-bit input shift register on the falling edge of the DIN 3 I serial clock input. GND 5 — Ground reference point for all circuitry on the part. SCLK 2 I Serial clock input. Data are transferred at rates up to 50MHz. Level-triggered control input (active low). This is the frame sychronization signal for the input data. When SYNC goes low, it enables the input shift register and data are transferred in on the falling SYNC 1 I edges of the following clocks. The DAC is updated following 16th clock cycle, unless SYNC is taken high before this edge, in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DACx311. See the SYNC Interrupt section for more details. VOUT 6 O Analog output voltage from DAC. The output amplifier has rail-to-rail operation. Copyright © 2008–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: DAC5311 DAC6311 DAC7311 |
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