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LM3533TME-40A Fiches technique(PDF) 5 Page - Texas Instruments |
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LM3533TME-40A Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 63 page LM3533 www.ti.com SNOSC68C – APRIL 2012 – REVISED SEPTEMBER 2015 6.5 Electrical Characteristics Unless otherwise specified VIN = 3.6 V; typical limits are for TA = 25°C and minimum and maximum limits apply over the full operating ambient temperature range ( −40°C ≤ TA ≤ +85°C). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ISHDN Shutdown current 2.7 V ≤ VIN ≤ 5.5 V, HWEN = GND 1 5 µA Full-scale current = 20.2 mA ILED_MIN Minimum LED current 9.5 µA Exponential mapping Thermal shutdown 140 TSD °C Hysteresis 15 BOOST CONVERTER Output current regulation 2.7 V ≤ VIN ≤ 5.5 V IHVLED(1/2) 17 20.2 23 mA (HVLED1 or HVLED2) full-scale current = 20.2mA, brightness code = 0xFF HVLED1 to HVLED2 Both current sinks are assigned IMATCH_HV 2.7 V ≤ VIN ≤ 5.5 V –2% 1% 2% matching (1) to Control Bank A Regulated current sink VREG_CS 400 mV headroom voltage Minimum current sink ILED = 95% of nominal VHR_HV headroom voltage for 190 250 mV full-scale current = 20.2 mA HVLED current sinks NMOS switch on RDSON ISW = 500 mA 0.3 Ω resistance ICL_BOOST NMOS switch current limit VIN = 3.6 V 880 1000 1120 mA ON threshold, 2.7 V ≤ VIN ≤ 5.5 V 39 40 41 Output overvoltage OVP select bits = 11 VOVP V protection Hysteresis 1 Boost frequency select bit = 0 450 500 550 ƒSW Switching frequency 2.7 V ≤ VIN ≤ 5.5 V kHz Boost frequency select bit = 1 900 1000 1100 DMAX Maximum duty cycle 94% CHARGE PUMP ILVLED(1/2/3/ Output current regulation 2.7 V ≤ VIN ≤ 5.5 V, full-scale current = 20.2 mA 17 20.2 23 mA 4/5) (low-voltage current sinks) brightness code = 0xFF LVLED current sink IMATCH_LV 2.7 V ≤ VIN ≤ 5.5 V –2% 1% 2% matching (2) Minimum current sink VHR_LV headroom voltage for ILED = 95% of nominal, full-scale current = 20.2 mA 80 110 mV LVLED current sinks Threshold for gain VGTH VLVLED falling 110 mV transition 1× gain 180 350 3 V ≤ VIN ≤ 5.5 V, ICL_PUMP Charge-pump current limit mA output referred 2× gain 240 Charge-pump output ROUT 1× gain 1.1 Ω resistance HWEN INPUT Logic low 0 0.4 VHWEN Logic thresholds V Logic high 1.2 VIN PWM INPUT VPWM_L Input logic low 2.7 V ≤ VIN ≤ 5.5 V 0 400 mV VPWM_H Input logic high 2.7 V ≤ VIN ≤ 5.5 V 1.25 VIN V (1) LED current sink matching between HVLED1 and HVLED2 is given by taking the difference between either (IHVLED1 or IHVLED2) and the average current between the two, and dividing by the average current between the two. This simplifies to (IHVLED1 (or IHVLED2) – IHVLED(AVE))/(IHVLED(AVE)) × 100. In this test, both HVLED1 and HVLED2 are assigned to Bank A. (2) LED current sink matching in the low-voltage current sinks (LVLED1 through LVLED5) is given as the maximum matching value between any two current sinks, where the matching between any two low voltage current sinks (X and Y) is given as (ILVLEDX (or ILVLEDY) – IAVE(X-Y))/(IAVE(X-Y)) × 100. In this test all LVLED current sinks are assigned to Bank C. Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM3533 |
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