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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TCA9538DBR Fiches technique(PDF) 6 Page - Texas Instruments |
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TCA9538DBR Fiches technique(HTML) 6 Page - Texas Instruments |
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6 / 37 page  TCA9538 SCPS199C – AUGUST 2014 – REVISED OCTOBER 2015 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP(1) MAX UNIT VI = VCC or GND, IO = 0, I/O = inputs, fscl = 400 kHz, No load 5.5 V 18 30 tr = 3 ns 5.5 V 34 VI = VCC or GND, IO = 0, 3.6 V 15 I/O = inputs, fscl = 400 kHz, No load 2.7 V 9 tr,max = 300 ns Operating mode μA 1.65 V 5 5.5 V 20 ICC VI = VCC or GND, IO = 0, 3.6 V 8 I/O = inputs, fscl = 100 kHz, No load 2.7 V 5 tr,max = 1 µs 1.65 V 3 5.5 V 1.9 3.5 3.6 V 1.1 1.8 VI = VCC or GND, IO = 0, Standby mode μA I/O = inputs, fscl = 0 kHz, No load 2.7 V 1.0 1.6 1.65 V 0.4 1.0 Additional current in standby One P-port input at VCC – 0.6 V, ΔICC 1.65 V to 5.5 V 70 µA mode Other P-port inputs at VCC or GND Ci SCL VI = VCC or GND 1.65 V to 5.5 V 4 5 pF SDA 5.5 6.5 Cio VIO = VCC or GND 1.65 V to 5.5 V pF P port 8 9.5 6.6 I 2C Interface Timing Requirements over operating free-air temperature range (unless otherwise noted) (see Figure 9) STANDARD MODE FAST MODE I2C BUS I2C BUS UNIT MIN MAX MIN MAX fscl 0 100 0 400 kHz I2C clock frequency tsch 4 0.6 μs I2C clock high time tscl 4.7 1.3 μs I2C clock low time tsp 50 50 ns I2C spike time tsds 250 100 ns I2C serial-data setup time tsdh 0 0 ns I2C serial-data hold time ticr 1000 20 300 ns I2C input rise time ticf 300 20 × (VDD / 5.5 V) 300 ns I2C input fall time tocf 10-pF to 400-pF bus 300 20 × (VDD / 5.5 V) 300 ns I2C output fall time tbuf 4.7 1.3 μs I2C bus free time between Stop and Start tsts 4.7 0.6 μs I2C Start or repeated Start condition setup tsth 4 0.6 μs I2C Start or repeated Start condition hold tsps 4 0.6 μs I2C Stop condition setup tvd(data) Valid data time SCL low to SDA output valid 3.45 0.9 μs ACK signal from SCL low to tvd(ack) Valid data time of ACK condition 3.45 0.9 μs SDA (out) low Cb 400 400 ns I2C bus capacitive load 6 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: TCA9538 |
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Description similaire - TCA9538DBR |
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