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SI88622BD-IS Fiches technique(PDF) 6 Page - Silicon Laboratories |
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SI88622BD-IS Fiches technique(HTML) 6 Page - Silicon Laboratories |
6 / 45 page Si88x2x 6 Rev. 0.5 Negative-Going Input Threshold VT– All inputs falling 1.23 V Input Hysteresis VHYS 0.44 V High Level Input Volt- age VIH 2.0 — — V Low Level Input Volt- age VIL —— 0.8 V High Level Output Voltage VOH lOH =–4mA VDDA, VDDB – 0.4 —— V Low Level Output Voltage VOL lOL =4mA — — 0.4 V Input Leakage Cur- rent IL —— ±10 µA Output Impedance ZO —50— Supply Current, CLOAD =15pF DC, VDDB = 3.3 V ± 10% Si88x20 VDDA VDDB VDDA VDDB All inputs = 0 All inputs = 0 All inputs = 1 All inputs = 1 — — — — 8.9 5.2 5.6 5.1 mA Si88x21 VDDA VDDB VDDA VDDB All inputs = 0 All inputs = 0 All inputs = 1 All inputs = 1 — — — — 7.9 4.9 5.9 3.0 mA Table 2. Electrical Characteristics1 (Continued) VIN =24 V; VDDA =VDDP = 3.0 to 5.5 V (see Figure 2) for all Si8822x/32x; VDDA = 4.3 V (see Figure 3) for all Si8842x/62x; TA = –40 to 125 °C unless otherwise noted. Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. Over recommended operating conditions as noted in Table 1. 2. VOUT = VSNS x (1 + R1/R2) + R1 x Ioffset 3. VDDP current needed for dc-dc circuits. 4. VDDA current needed for dc-dc circuits. 5. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 6. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 7. Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output. |
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Description similaire - SI88622BD-IS |
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