CDCP1803RTHT datasheet(8/25 Pages) TI1

No de pièce	CDCP1803RTHT

Description	1:3 LVPECL CLOCK BUFFER

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Fabricant	TI1 [Texas Instruments]

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−160

−155

−150

−145

−140

−135

−130

−125

−120

−115

−110

VDD = 3.3 V

TA = 25°C

f = 622 MHz

÷1 Mode

f − Frequency Offset From Carrier − Hz

10

100

1k

100M

10k

100k

10M

1M

G001

f − Frequency − GHz

0.40

0.45

0.50

0.55

0.60

0.65

0.70

0.75

0.80

0.85

0.90

0.1

0.3

0.5

0.7

0.9

1.1

1.3

1.5

TA = 25°C

Load = 50

Ω to VDD − 2 V

VDD = 3.6 V

VDD = 3.3 V

VDD = 3 V

G002

CDCP1803

SCAS727F – NOVEMBER 2003 – REVISED DECEMBER 2013

www.ti.com

ADDITIVE PHASE NOISE

LVPECL OUTPUT SWING

vs

FREQUENCY OFFSET FROM CARRIER – LVPECL

FREQUENCY

Figure 2.

Figure 3.

SUPPLY CURRENT ELECTRICAL CHARACTERISTICS

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

All outputs enabled and terminated with 50

Ω to

Full load

VDD – 2 V on LVPECL outputs, f = 800 MHz for LVPECL

140

outputs, VDD = 3.3 V

Supply current

IDD

Outputs enabled, no output load, f = 800 MHz for LVPECL

90

mA

No load

outputs, VDD = 3.6 V

Supply current saving per LVPECL

f = 800 MHz for LVPECL output, VDD = 3.3 V

10

output stage disabled, no load

All outputs in high-impedance state by control logic,

IDDZ

Supply current, 3-state

0.5

mA

f = 0 Hz, VDD = 3.6 V

8

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