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CDCLVP2104 Fiches technique(PDF) 7 Page - Texas Instruments |
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CDCLVP2104 Fiches technique(HTML) 7 Page - Texas Instruments |
7 / 31 page CDCLVP2104 www.ti.com SCAS889B – OCTOBER 2009 – REVISED JANUARY 2016 6.7 Electrical Characteristics: LVPECL Output, at VCC = 2.375 V to 2.625 V at TA = –40°C to +85°C and TPCB ≤ 105°C (unless otherwise noted) (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA ≤ 85°C VCC – 1.26 VCC – 0.9 VOH Output high voltage V TPCB ≤ 105°C VCC – 1.26 VCC – 0.83 TA ≤ 85°C VCC – 1.7 VCC – 1.3 VOL Output low voltage V TPCB ≤ 105°C VCC – 1.7 VCC – 1.25 VOUT, DIFF, PP Differential output peak-peak voltage fIN ≤ 2 GHz 0.5 1.35 V VAC_REF Input bias voltage(2) IAC_REF = 2 mA VCC – 1.6 VCC – 1.1 V Outputs unterminated, 78 TA ≤ 85°C IEE Supply internal current mA Outputs unterminated, 78 TPCB ≤ 105°C All outputs terminated, 50 Ω to VCC – 2 330 TA ≤ 85°C ICC Output and internal supply current mA All outputs terminated, 50 Ω to VCC – 2 360 TPCB ≤ 105°C (1) Figure 10 and Figure 11 show DC and AC test setup. (2) Internally generated bias voltage (VAC_REF) is for 3.3-V operation only. TI recommends applying externally generated bias voltage for VCC < 3 V. 6.8 Electrical Characteristics: LVPECL Output, at VCC = 3 V to 3.6 V at TA = –40°C to +85°C and TPCB ≤ 105°C (unless otherwise noted) (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA ≤ 85°C VCC – 1.26 VCC – 0.9 VOH Output high voltage V TPCB ≤ 105°C VCC – 1.26 VCC – 0.85 TA ≤ 85°C VCC – 1.7 VCC – 1.3 VOL Output low voltage V TPCB ≤ 105°C VCC – 1.7 VCC – 1.3 VOUT, DIFF, PP Differential output peak-peak voltage fIN ≤ 2 GHz 0.65 1.35 V VAC_REF Input bias voltage IAC_REF = 2 mA VCC – 1.6 VCC – 1.1 V Outputs unterminated, 78 TA ≤ 85°C IEE Supply internal current mA Outputs unterminated, 78 TPCB ≤ 105°C All outputs terminated, 50 Ω to VCC – 2 330 TA ≤ 85°C ICC Output and internal supply current mA All outputs terminated, 50 Ω to VCC – 2 360 TPCB ≤ 105°C (1) Figure 10 and Figure 11 show DC and AC test setup. 6.9 Timing Requirements, at VCC = 2.375 V to 2.625 V Refer to Figure 1 and Figure 2. MIN NOM MAX UNIT VIN, DIFF, PP = 0.1 V 450 tPD Propagation delay ps VIN, DIFF, PP = 0.3 V 450 tSK,PP Part-to-part skew 125 ps tSK,O_WB Within bank output skew 15 ps tSK,O_BB Bank-to-bank output skew Both inputs have equal skew 20 ps Pulse skew (with 50% duty cycle Crossing-point-to-crossing-point distortion, tSK,P –50 50 ps input) fOUT = 100 MHz Copyright © 2009–2016, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: CDCLVP2104 |
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