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74AUP1T97FHX Fiches technique(PDF) 4 Page - Fairchild Semiconductor

No de pièce 74AUP1T97FHX
Description  Low Power Configurable Gate with Voltage-Level Translator
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74AUP1T97FHX Fiches technique(HTML) 4 Page - Fairchild Semiconductor

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© 2008 Fairchild Semiconductor Corporation
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74AUP1T97 • 1.0.3
4
74AUP1T97 Logic Configurations
Figure 3 through Figure 9 show the logical functions
that can be implemented using the 74AUP1T97. The
diagrams show the DeMorgan’s equivalent logic duals
for
a
given
two-input
function.
The
logical
implementation is next to the board-level physical
implementation of how the pins of the function should
be connected.
1
2
3
6
5
4
B
Y
C
VCC
B
A
C
Y
A
A
GND
Note:
1.
When C is L, Y=B.
2.
When C is H, Y=A.
1
2
3
6
5
4
A
Y
C
VCC
C
Y
A
GND
Figure 3.
2-to-1 MUX
Figure 4.
2-Input AND Gate
1
2
3
6
5
4
A
Y
C
VCC
C
Y
A
C
Y
A
GND
C
Y
B
C
Y
B
1
2
3
6
5
4
B
Y
C
VCC
GND
Figure 5.
Input OR Gate with One Inverted Input
2-Input NAND Gate with One Inverted Input
Figure 6.
2-Input AND Gate with One Inverted Input
2-Input NOR Gate with One Inverted Input
1
2
3
6
5
4
B
Y
C
VCC
C
Y
B
GND
1
2
3
6
5
4
Y
C
VCC
Y
C
GND
Figure 7. 2-Input OR Gate
Figure 8.
Inverter
1
2
3
6
5
4
Y
VCC
Y
B
GND
B
Figure 9.
Buffer


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Description similaire - 74AUP1T97FHX

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